Semiconductor Chip Foreign Matter Removal Using Abrasive Slopes
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Solution Overview
Problem
Existing methods for removing foreign matter from semiconductor chips before testing are either ineffective or increase manufacturing costs, as they require complex processes like blowing purge gas or modifying metal electrodes.
Innovation Solution
A test apparatus with a foreign matter removal unit featuring slopes with abrasive or adhesive coatings, vibrators, and a transfer unit to securely hold and position the chip for effective foreign matter removal, ensuring reliable electrical characteristic testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If purge gas is blown against the wafer to remove foreign matter, then foreign matter removal is attempted, but the method is ineffective for removing foreign matter from diced chips
Solution Approach 1:
The patent replaces the pneumatic method (purge gas blowing) with a mechanical method (abrasive paper contact). The abrasive paper is pressed against the diced chip surfaces through a pressing member, providing direct mechanical abrasion that effectively removes foreign matter adhering to the chip sides, which gas blowing cannot achieve.
Solution Approach 2:
The patent introduces an abrasive paper as an intermediary substance between the pressing member and the diced chip. The abrasive paper serves as the actual medium that contacts and removes foreign matter from the chip surfaces, while the pressing member only provides the necessary contact force without directly touching the chip.
2Object-affected harmful factors
If metal electrodes are removed to expose dicing lines and minimize foreign matter occurrence, then foreign matter occurrence is reduced, but manufacturing cost increases
Solution Approach 1:
The patent applies preliminary action by removing foreign matter from diced chips after dicing but before testing. The abrasive paper treatment is performed on already-diced chips to remove foreign matter that adhered during the dicing process, eliminating the need to modify the dicing design or remove metal electrodes in advance.
Solution Approach 2:
The patent extracts the foreign matter removal function from the dicing process design and implements it as a separate post-dicing treatment step. Instead of preventing foreign matter occurrence through electrode design modifications, the patent extracts and addresses the foreign matter problem after dicing through abrasive treatment.
3Device complexity
If a simple gas blowing method is used, then the process is simple, but foreign matter removal is ineffective
Solution Approach 1:
The patent uses composite material by combining the abrasive paper (with abrasive particles embedded in a flexible substrate) with the pressing member. This composite structure provides both the mechanical contact capability and the abrasive function in a single integrated component, achieving effective foreign matter removal without complex multi-component systems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables reliable removal of foreign matter from semiconductor chips, enhancing test accuracy and reducing manufacturing costs by using a simple and efficient method that effectively contacts all sides of the chip with abrasive or adhesive surfaces.
Implementation Method 1
a first slope provided with an abrasive coating or an adhesive sheet and a second slope provided with an abrasive coating or an adhesive sheet
Implementation Method 2
a first slope provided with an abrasive coating or an adhesive sheet and a second slope provided with an abrasive coating or an adhesive sheet
Data Source
AI summary
A test apparatus includes a foreign matter removal unit having a first slope provided with an abrasive coating or an adhesive sheet and a second slope provided with an abrasive coating or an adhesive sheet, the second slope facing the first slope in such a manner that an upper end of the second slope is spaced from an upper end of the first slope a greater distance than a lower end of the second slope is spaced from a lower end of the first slope, a test unit for testing electrical characteristics of a semiconductor chip, and a transfer unit for holding and releasing the semiconductor chip at a position above the first and second slopes and transferring the semiconductor chip to the test unit.