Chip Antenna Using Ceramic and PTFE Substrates for 5G Miniaturization

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Solution Overview

Problem

In 5G communication systems operating in high frequency bands, conventional antennas face challenges due to reduced wavelength, leading to increased propagation loss and reduced transmission distance, necessitating a compact and efficient chip antenna solution for mobile devices.

Innovation Solution

A chip antenna design utilizing ceramic and polytetrafluoroethylene (PTFE) dielectric substrates, with strategically placed patches and vias, and a bonding layer to minimize size while maximizing radiation efficiency and gain, by controlling permittivity and spacing to optimize RF signal propagation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If conventional antenna designs are used in GHz band, then antenna structure is simple, but antenna size cannot be miniaturized and propagation loss increases

Engineering Contradiction:
Improveantenna sizeVSAvoidpropagation loss
Core Design Contradiction:
Volume of moving objectVSLoss of energy

Solution Approach 1:

The patent employs a composite dielectric substrate structure combining ceramic material (first dielectric substrate) and PTFE material (second dielectric substrate). This composite approach enables miniaturization of the antenna while maintaining low propagation loss by optimizing the electromagnetic field distribution through the combination of different dielectric properties, thus resolving the contradiction between size reduction and energy loss.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent utilizes a three-dimensional stacked patch configuration with multiple dielectric layers, transitioning from conventional planar two-dimensional antenna designs. By stacking patches in the vertical dimension and utilizing via holes for inter-layer connections, the antenna achieves compact size while maintaining effective radiating area and reducing propagation loss through optimized current distribution.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If dielectric substrates are stacked to miniaturize antenna, then antenna volume is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improveantenna volumeVSAvoidstructure complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent divides the dielectric substrate into two separate stacked layers (first dielectric substrate made of ceramic and second dielectric substrate made of PTFE), allowing independent optimization of each layer's properties and simplifying the manufacturing process. This segmentation enables miniaturization while managing complexity by treating the structure as modular components that can be fabricated and assembled separately.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves miniaturization of the chip antenna, enhancing radiation efficiency and gain, and improving durability and thermal stability, thus addressing the challenges of high-frequency propagation in 5G systems.

Implementation Method 1

One of the first dielectric substrate and the second dielectric substrate is formed of ceramic and another is formed of polytetrafluoroethylene (PTFE)

Methodology Applied
Scientific EffectDielectric permittivity: Dielectric Permittivity

Data Source

PatentUS11069954B2Chip antenna
Publication Date: 2021.07.20 SAMSUNG ELECTRO MECHANICS CO LTD
  • US11069954B2 patent drawing
  • US11069954B2 patent drawing
  • US11069954B2 patent drawing

AI summary

A chip antenna includes a first dielectric substrate, a second dielectric substrate spaced apart from and opposing the first dielectric substrate, a first patch disposed on the first dielectric substrate, a second patch disposed on the second dielectric substrate, and a mounting pad and a feed pad disposed on a mounting surface of the first dielectric substrate. The first dielectric substrate, mounted on a mounting substrate through the mounting pad, is electrically connected to the mounting substrate through the feed pad. One of the first dielectric substrate and the second dielectric substrate is formed of ceramic and another is formed of polytetrafluoroethylene (PTFE).