Chip Antenna With Shielding Layer For 5G Interference Reduction
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Solution Overview
Problem
In 5G communications systems operating in high frequency bands, general-use antennas face challenges due to the small wavelengths, making it difficult to design compact antennas that minimize interference and maximize radiation efficiency for mobile devices.
Innovation Solution
A chip antenna design featuring ceramic substrates with strategically placed patches and shielding layers, including a shielding layer connected to ground potential and another floated, to reduce interference and enhance radiation efficiency by optimizing the dielectric constant and spacing between antenna elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If general-use antennas are used in GHz bands, then antenna functions are provided, but wavelengths are as small as several millimeters making it difficult to design compact antennas
Solution Approach 1:
The antenna is divided into multiple patches (first patch, second patch, third patch) arranged in an array configuration. Each patch contributes to the overall radiation pattern, allowing the antenna to achieve adequate radiation efficiency in a compact form factor by distributing the radiating function across multiple smaller elements rather than requiring a single large element
Solution Approach 2:
The patent transitions from a planar two-dimensional antenna design to a three-dimensional structure by stacking multiple ceramic substrates with patches at different heights and orientations. This vertical arrangement allows compact antennas to achieve the necessary electrical length and radiation efficiency by utilizing the third dimension (height) rather than expanding in the horizontal plane
2Productivity
If chip antennas are arranged in an array configuration, then communication capacity is improved, but interference between adjacent chip antennas increases
Solution Approach 1:
A shielding layer is introduced as an intermediary element positioned between adjacent chip antennas in the array. This shielding layer, made of conductive material and connected to ground potential, acts as a mediator that blocks electromagnetic coupling between neighboring antennas, thereby reducing interference while allowing the antennas to maintain their array configuration for enhanced communication capacity
Solution Approach 2:
The shielding layer is pre-positioned between adjacent antennas to prevent harmful electromagnetic interference before it can develop. By placing the shielding structure in advance during the antenna assembly process, the design proactively counteracts the potential interference issue that would otherwise arise from close proximity of multiple radiating elements
3Reliability
If shielding layers are added to reduce interference, then radiation efficiency is improved, but device complexity increases
Solution Approach 1:
The shielding layer is merged with the ground structure of the antenna system, utilizing the existing ground plane as part of the shielding mechanism. This integration approach allows the shielding function to be achieved without adding completely separate complex structures, as the ground connection serves dual purposes of providing reference potential and electromagnetic shielding
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces interference between adjacent chip antennas in an array configuration while improving radiation efficiency and gain, suitable for 5G frequency bands, and miniaturizes the antenna module, reducing manufacturing costs and volume.
Implementation Method 1
a shielding layer disposed on a side surface of the insertion member... one or more of the first and second shielding layers is connected to a ground potential
Data Source
AI summary
A chip antenna includes a first ceramic substrate, a second ceramic substrate disposed to oppose the first ceramic substrate, a first patch, disposed on the first ceramic substrate, configured to operate as a feed patch, a second patch, disposed on the second ceramic substrate, configured to operate as a radiation patch, an insertion member disposed between the first ceramic substrate and the second ceramic substrate, and a shielding layer disposed on a side surface of the insertion member.


