Semiconductor Chip Anti-Reverse Engineering Trenches
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Solution Overview
Problem
Semiconductor chips are vulnerable to reverse engineering, which can lead to the exposure of sensitive information and intellectual property, necessitating a solution to protect these components.
Innovation Solution
The integration of sealed trenches within the semiconductor chip's active and wiring levels filled with chemical agents that damage or destroy materials upon exposure, preventing reverse engineering by chemical attack or physical stress when the seal is broken.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If semiconductor chips are designed with transparent or accessible structures for quality control and debugging, then manufacturing and operational reliability improve, but vulnerability to reverse engineering increases
Solution Approach 1:
The patent implements anti-reverse engineering measures during the manufacturing process by forming sealed trenches and filling them with chemical agents before the chip is completed. This preliminary action ensures that when the chip is later reverse-engineered, the chemical agents are already in place to destroy sensitive information, thus preventing the harmful effect without compromising the chip's functional transparency during manufacturing and operation.
Solution Approach 2:
The patent converts the potential harm of chemical agents (which could damage the chip during normal operation) into a benefit by carefully selecting agents that are inert under normal conditions but become reactive when exposed to specific triggers during reverse engineering attempts. The chemical agents remain harmless during manufacturing and operation but activate to destroy sensitive information when the chip is subjected to reverse engineering, thus converting a potential harmful factor into a protective mechanism.
2Object-affected harmful factors
If chemical agents are introduced into trenches to prevent reverse engineering, then protection against information exposure improves, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent divides the anti-reverse engineering protection into discrete segmented trenches distributed throughout the chip structure. Each trench is independently formed and filled with chemical agents, allowing the protection mechanism to be integrated into existing chip layouts without requiring a complete redesign. This segmentation approach enables selective placement of protective elements in critical areas while maintaining overall device functionality and reducing complexity compared to a uniform protective layer.
Solution Approach 2:
The patent uses sealed trenches as intermediary structures that contain and isolate chemical agents from the rest of the chip during normal operation. These trenches act as mediators that prevent direct contact between the chemical agents and chip materials, ensuring safety during manufacturing and operation. The trenches provide a controlled environment that allows the chemical agents to be integrated into the chip structure without significantly increasing overall device complexity.
3Object-affected harmful factors
If chemical agents are placed in trenches to destroy sensitive information upon exposure, then anti-reverse engineering effectiveness improves, but risk of accidental damage during manufacturing increases
Solution Approach 1:
The patent creates an inert environment by sealing the chemical agents within trenches that are isolated from the rest of the chip structure during manufacturing and operation. The trenches act as protective enclosures that prevent accidental exposure of the chemical agents to materials they could damage. This inert environment approach ensures that the chemical agents remain dormant and harmless during the manufacturing process, eliminating the risk of accidental damage while maintaining anti-reverse engineering effectiveness.
Solution Approach 2:
The patent utilizes parameter changes by selecting chemical agents that exhibit different reactivity states under different conditions. The agents are chosen to be inert at manufacturing temperatures and conditions but become reactive when exposed to specific triggers during reverse engineering attempts (such as elevated temperatures, specific chemicals, or physical stress). This parameter change approach allows the same chemical agents to serve dual purposes: remaining safe during manufacturing while becoming effective protective agents when activated during reverse engineering.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents reverse engineering by ensuring that sensitive information remains secure, as the chemical agents within the trenches cause damage to the chip's materials when the seal is compromised, making it difficult to access or reverse-engineer the chip's internal structures.
Implementation Method 1
a chemical agent filling the trench, portions of at least one wiring level of the stack of wiring levels not chemically inert to the chemical agent
Implementation Method 2
a mixture of the second chemical agent and the third chemical agent generating a fourth chemical agent that can cause damage to or destroys portions of at least one wiring level
Data Source
AI summary
A structure and a method. The structure includes a semiconductor substrate; a stack of wiring levels from a first wiring level to a last wiring level, the first wiring level closest to the semiconductor substrate and the last wiring level furthest from the semiconductor substrate, the stack of wiring levels including an intermediate wiring level between the first wiring level and the last wiring level; active devices contained in the semiconductor substrate and the first wiring level, each wiring level of the stack of wiring levels comprising a dielectric layer containing electrically conductive wire; a trench extending from the intermediate wiring level, through the first wiring level into the semiconductor substrate; and a chemical agent filling the trench, portions of at least one wiring level of the stack of wiring levels not chemically inert to the chemical agent or a reaction product of the chemical agent.