Chip-on-Array Interposer Architecture for Low-Parasitic Transducer Routing

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Solution Overview

Problem

Achieving efficient interconnection between multidimensional transducer arrays and electronics is challenging due to limited space and potential failure risks, especially in chip-on-array and multi-layered flex approaches, which result in high electrical parasitics and complex signal routing.

Innovation Solution

A chip-on-array approach using separate interposers for acoustic and electronic modules, with staggered vias and different connection processes, allows for separate testing and reduced electrical parasitics by minimizing electrical connections through staggered vias and staggered pitch adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If chip-on-array approach is used with acoustic array built directly on ASIC chip, then electrical interconnections are shortest with low parasitics, but process yield is very low and testability is poor

Engineering Contradiction:
Improveelectrical parasiticsVSAvoidprocess yield
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The invention divides the monolithic chip-on-array structure into separate modules: an acoustic array module and an electronics module, each fabricated independently on separate substrates. This segmentation allows each module to be tested and validated separately before integration, improving process yield while maintaining short electrical interconnections through direct coupling of the modules.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The acoustic array and electronics are fabricated and tested separately before final integration. This preliminary action allows for independent optimization and validation of each module, ensuring high reliability before committing to the final assembled product, thereby improving overall process yield.

Inventive Principle:
Principle #10Preliminary action

2Object-affected harmful factors

If acoustic array is built directly on expensive electronics, then electrical parasitics are minimized, but loss of array leads to loss of expensive electronic module

Engineering Contradiction:
Improveelectrical parasiticsVSAvoidelectronic module cost
Core Design Contradiction:
Object-affected harmful factorsVSLoss of substance

Solution Approach 1:

By segmenting the system into separate acoustic and electronic modules, the invention protects the expensive electronics from damage. If the acoustic array fails, only the relatively inexpensive acoustic module needs to be replaced, not the entire integrated structure with expensive electronics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces a protective interface structure between the acoustic array and electronics that acts as an intermediary. This interface allows electrical connections to be maintained with low parasitics while physically isolating the expensive electronics from potential damage by the acoustic array.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If multi-layered flex approach is used to route signals for many elements, then array can be curved and flexibility is improved, but electrical parasitics are high due to multiple flex circuits and long traces

Engineering Contradiction:
Improvecurved array capabilityVSAvoidelectrical parasitics
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The invention segments the signal routing into two parts: short vertical connections within the acoustic module and short connections within the electronics module. The long horizontal traces of multi-layered flex are eliminated by this segmentation, significantly reducing electrical parasitics while maintaining the ability to form curved arrays through the modular structure.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution provides minimized electrical parasitics, improved process yield, and enhanced reliability with separate testability of acoustic and electronic modules, reducing overall costs and improving ultrasound scanning performance.

Implementation Method 1

A first interposer is bonded to the acoustic array with a material bonding at a temperature below a Curie temperature of the transducer elements

Methodology Applied
Scientific EffectPiezoelectric Effect: Piezoelectric Effect

Implementation Method 2

A second interposer is bonded to the integrated circuit with material bonding at a temperature above the Curie temperature of the transducer elements

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 3

Vias formed in the first and second interposers electrically connect the transducer elements to the integrated circuit

Methodology Applied
Scientific EffectElectrical Conduction: Conduction (electrical)

Data Source

PatentUS20250332613A1Chip-on-array with interposer for a multidimensional transducer array
Publication Date: 2025.10.30 SIEMENS MEDICAL SOLUTIONS USA INC
  • US20250332613A1 patent drawing
  • US20250332613A1 patent drawing
  • US20250332613A1 patent drawing

AI summary

In a chip-on-array approach, acoustic and electronic modules are separately formed. The acoustic stack is connected to one interposer, and the electronics are connected to another interposer. Different connection processes (e.g., using low temperature bonding for the acoustic stack and higher temperature-based interconnect for the electronics) may be used. This arrangement may allow for different pitches of the transducer elements and the I/O of the electronics by staggering vias in the interposers. The two interposers are then connected to form the chip-on-array.