Semiconductor Chip Bonding Layer Thickness Variation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor devices with stacked memory chips, the bonding intensity between chips is often inadequate, particularly in regions not in contact with the lower chip, leading to potential deformation and reduced reliability during stacking and use.
Innovation Solution
A method of manufacturing semiconductor devices involves forming a bonding layer with a thicker projected section on the rear surface of the chip in regions not in contact with the lower chip, which enhances bonding strength and reduces deformation during stacking by increasing the thickness of the bonding layer in these areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a uniform thickness bonding layer is formed on the chip, then the manufacturing process is simple, but the bonding strength in regions not in contact with the lower chip is insufficient
Solution Approach 1:
The bonding layer is designed with non-uniform thickness, having a first thickness in regions not in contact with the lower chip and a second thickness in contact regions. This local differentiation ensures sufficient bonding strength in the non-contact regions while maintaining appropriate bonding in contact regions, resolving the contradiction between uniform simplicity and localized strength requirements.
Solution Approach 2:
The bonding layer thickness is varied in the vertical dimension rather than maintaining uniform thickness throughout. By introducing thickness variation along the vertical axis, the patent achieves enhanced bonding strength in specific regions without requiring complex lateral structural modifications.
2Strength
If the bonding layer is made thicker to improve bonding strength, then bonding intensity improves, but the chip deformation increases during stacking
Solution Approach 1:
The bonding layer thickness is locally optimized: thicker in non-contact regions to prevent deformation and provide structural support, and thinner in contact regions to allow proper bonding without excessive deformation. This spatially differentiated approach resolves the contradiction between needing thickness for strength and avoiding deformation.
3Strength
If different chip thicknesses are used to accommodate varying bonding layer requirements, then bonding strength is improved, but the manufacturing complexity and cost increase
Solution Approach 1:
Instead of manufacturing chips with different thicknesses, the patent maintains uniform chip thickness and achieves varying bonding layer thickness through the bonding process itself. This approach preserves manufacturing simplicity while still providing the localized thickness variation needed for optimal bonding strength in different regions.
Solution Approach 2:
The solution moves from varying chip thickness (one dimensional change in chip geometry) to varying bonding layer thickness (one dimensional change in bonding layer geometry). This dimensional shift maintains chip uniformity for easy manufacturing while achieving the required bonding differentiation through the bonding layer configuration.
Data Source
AI summary
According to one embodiment, a method of manufacturing a semiconductor device, a bonding layer is formed on a first surface of a chip region of a semiconductor wafer. Semiconductor chips are singulated along a dicing region. The semiconductor chips are stacked stepwise via the bonding layer. In formation of the bonding layer of the semiconductor chip, in at least a part of a first region of the first surface not in contact with the other semiconductor chip in a stacked state, a projected section where the bonding layer is formed thicker than the bonding layer in a second region that is in contact with the other semiconductor chip is provided.