Semiconductor Chip Bonding Structure for Void-Free Metal Pad Interfaces
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Solution Overview
Problem
In semiconductor device manufacturing, step differences at metal pads and adjacent bonding surfaces can lead to voids during bonding, resulting in yield drops due to uncontrolled step differences despite polishing processes.
Innovation Solution
The semiconductor device comprises a first and second semiconductor chip with insulating layers and metal pads, where barriers are disposed between the insulating layers and metal pads, and the insulating layers are bonded to create a planar interface, ensuring no voids form around the metal pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a polishing process is applied to the bonding surface of each substrate, then the surface planarity is improved, but step differences at the metal pad and adjacent bonding surface still occur and cannot be controlled within the tolerance range
Solution Approach 1:
The patent applies preliminary actions by forming barriers around metal pads before the bonding process, and performing selective removal of these barriers after bonding. This preliminary barrier formation prevents void formation at the metal pad edges during bonding, addressing the reliability issue before it occurs. The barriers are strategically placed in advance to compensate for the step differences that polishing cannot eliminate.
Solution Approach 2:
The patent introduces barriers as intermediary structures between the metal pads and the bonding surface. These barriers act as mediators that fill the step differences and prevent void formation during bonding. The barriers are temporarily present during bonding and are subsequently removed, serving their protective function only when needed without interfering with the final bonding quality.
2Manufacturing precision
If the step difference at the metal pad is not controlled within the tolerance range, then voids occur during bonding, but polishing alone cannot control the step difference within the required tolerance
Solution Approach 1:
The patent forms barriers around metal pads as a preliminary action before bonding to control step differences. This approach addresses the manufacturing precision requirement by proactively managing the step difference issue rather than relying solely on polishing. The barriers are formed in advance to ensure proper void prevention without requiring complex real-time adjustments during bonding.
Solution Approach 2:
The patent extracts or removes the barriers after they have served their purpose during bonding. This selective removal eliminates the temporary structures that were only needed for void prevention, leaving a clean bonding interface. This approach controls step differences during the critical bonding phase without permanently adding complexity to the final structure.
3Reliability
If voids form at the metal pad interface during bonding, then bonding strength is reduced and yield drops, but conventional polishing cannot prevent this issue
Solution Approach 1:
The patent takes preliminary action by forming barriers around metal pads before bonding to prevent void formation. This proactive measure ensures that the metal pad interfaces are protected during bonding, maintaining bonding strength and preventing yield drops. The barriers are in place before the bonding process begins, ensuring continuous protection throughout the critical bonding phase.
Solution Approach 2:
The barriers serve as intermediary structures that prevent direct contact between the bonding surfaces at the metal pad edges, where voids would otherwise form. These mediators fill the problematic step difference regions and ensure uniform bonding pressure distribution, thereby maintaining bonding strength and preventing yield reduction without interfering with the overall bonding process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances bonding strength by eliminating voids at the metal pad interfaces, thereby improving the overall yield and reliability of the semiconductor device.
Implementation Method 1
The top surfaces of the first insulating layer and the second insulating layer are bonded to provide a bonding interface
Data Source
AI summary
A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.