Semiconductor Chip Bonding with Release Grooves for Solder Leakage
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Solution Overview
Problem
Conventional semiconductor chip bonding methods using molten solder often result in solder leakage and shrinkage, leading to reduced withstand voltage and impaired heat dissipation due to voids filled with low thermal conductivity resin, causing stress concentration and potential cracking during thermal cycles.
Innovation Solution
A semiconductor device with a conductive member featuring release grooves connected to its peripheral edges, where the semiconductor chip is bonded using a joint material with an area ratio of 1.0 or less, allowing leaked solder to be directed into the grooves, preventing surface contamination and minimizing voltage decrease, while the grooves' design enhances heat dissipation and structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If molten solder is pressed and crushed onto the semiconductor chip, then bonding is achieved, but solder leakage occurs reducing withstand voltage
Solution Approach 1:
The patent extracts the harmful element (excess solder) by providing dedicated grooves that capture and isolate leaked solder away from the semiconductor chip surface, preventing it from affecting electrical performance while maintaining bonding integrity
2Reliability
If molten solder is pressed and crushed onto the semiconductor chip, then bonding is achieved, but solder shrinkage creates voids reducing heat dissipation
Solution Approach 1:
The patent performs preliminary action by pre-forming grooves in the substrate before bonding, which guides solder flow and prevents shrinkage-induced voids. This preliminary structural preparation ensures complete solder coverage and eliminates vacant regions that would impede heat dissipation
3Quantity of substance
If solder leakage occurs, then bonding coverage increases, but withstand voltage decreases due to surface contamination
Solution Approach 1:
The patent converts the harmful effect of solder leakage into a beneficial outcome by designing grooves that intentionally capture excess solder. The leaked solder, which would normally harm the chip, is instead directed into designated channels that isolate it from the semiconductor surface, maintaining both coverage and electrical performance
4Ease of manufacture
If solder shrinkage occurs, then bonding is simplified, but stress concentration causes cracking during thermal cycles
Solution Approach 1:
The patent provides beforehand cushioning by creating grooves that accommodate solder shrinkage and stress. These grooves act as stress-absorbing features that prevent crack propagation during thermal cycling, protecting the semiconductor chip from mechanical failure while maintaining bonding simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents solder shrinkage and minimizes the decrease in withstand voltage, even with solder leakage, by utilizing the release grooves to manage excess solder and improve thermal management, thus enhancing the reliability and cost-effectiveness of the semiconductor device.
Implementation Method 1
bonding the semiconductor chip onto the conductive member by melting the joint material while applying a load to the semiconductor chip
Implementation Method 2
The semiconductor chip is bonded onto the island using a molten solder
Implementation Method 3
a release groove formed on the surface of the first conductive member... the one end and the other end of the release groove are opened at the end surfaces
Data Source
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AI summary
A semiconductor device according to the present invention includes a semiconductor chip (7), a conductive member (6) for supporting the semiconductor chip, a joint material (27) provided between the conductive member and the semiconductor chip, and a release groove (13) formed on the surface of the conductive member and arranged away from the semiconductor chip with the one end and the other end of the release groove connected to the peripheral edges of the conductive member, respectively.