Chip Bonding Interconnect Structure With Smoothed Via Sidewalls

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Solution Overview

Problem

The manufacturing of semiconductor devices with electrical interconnection structures is complicated due to the use of various materials with different etch rates, leading to poor bondability, reliability issues, and potential cracking or delamination, as seen in the lateral etching of trenches which results in uneven and rough sidewall surfaces.

Innovation Solution

The implementation of a recessed portion coated with an oxide layer to smooth the sidewall surface and improve the reliability of the electrical interconnection structure, using a method that involves selective etching and deposition of metallic structures as hard masks, followed by the application of a conductive material to connect metallic structures across semiconductor chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If selective etching is performed on adjacent layers with different etch rates, then the electrical interconnection structure can be formed, but the sidewall surfaces become uneven and rough

Engineering Contradiction:
Improvetrench formation precisionVSAvoidsidewall surface smoothness
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

A mandrel structure is formed beforehand in the trench before filling with conductive material. This preliminary structure serves as a template that guides the conductive material deposition and ensures uniform filling, compensating for the uneven sidewalls created by selective etching of adjacent layers with different etch rates.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mandrel acts as an intermediary structure between the uneven trench sidewalls and the conductive material. It provides a uniform surface for conductive material deposition and ensures complete filling of the trench, mediating the interface between the rough etched surfaces and the smooth conductive fill.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple materials with different properties are used in adjacent layers, then the semiconductor device functionality is enhanced, but the bondability between layers deteriorates

Engineering Contradiction:
Improvedevice functionalityVSAvoidlayer bondability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

Different materials are used in different regions (adjacent layers) to provide specific local functions, while the mandrel structure provides a uniform local quality at the trench interface that ensures reliable bonding and connection across all layers, regardless of the varying material properties in adjacent regions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The mandrel structure provides a homogeneous interface and uniform physical properties at the trench location, creating consistency in the connection region despite the heterogeneity of different materials in adjacent layers. This homogeneous interface improves bondability and reliability at the critical interconnection points.

Inventive Principle:
Principle #33Homogeneity

3Ease of manufacture

If conductive material is deposited directly into trenches with rough sidewalls, then the manufacturing process is simplified, but the reliability of the electrical interconnection structure decreases

Engineering Contradiction:
Improvedeposition process simplicityVSAvoidinterconnection structure reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The mandrel structure is formed as a preliminary element before conductive material deposition. This preliminary structure ensures uniform filling and reliable electrical connections, compensating for the rough sidewalls without requiring complex additional processing steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mandrel serves as an intermediary that enables reliable conductive material deposition into trenches with rough sidewalls. It provides a uniform surface for deposition and ensures complete filling, mediating between the rough trench walls and the smooth conductive fill to achieve reliable electrical interconnection.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability and smoothness of the electrical interconnection structure, reducing yield loss and improving the overall performance of semiconductor devices by ensuring a stable and even conductive material deposition across the semiconductor chips.

Implementation Method 1

a via dielectric layer, smoother than a surface of the IMD layer, is formed over a portion of the IMD layer and a via structure

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

A conductive material is formed over the via dielectric layer, the first chip, the bonding interface, and the second chip

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 3

A conductive material is formed over the via dielectric layer, the first chip, the bonding interface, and the second chip

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 4

A portion of the IMD layer is removed to expose the first metallic structure, wherein a number of staggered portions having a zigzag configuration is formed adjacent to the different materials

Methodology Applied
Scientific EffectChemical Etching:

Data Source

PatentUS11837595B2Semiconductor device structure and method for manufacturing the same
Publication Date: 2023.12.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11837595B2 patent drawing
  • US11837595B2 patent drawing
  • US11837595B2 patent drawing

AI summary

A semiconductor device structure includes a first chip, second chip, a first metal structure, a second metal structure, a first via structure and a second via structure. The first chip includes n inter metal dielectric (IMD) layer, which includes different materials adjacent to generate a number of staggered portions having a zigzag configuration. The second chip bonded to the first chip generates a bonding interface. The first metal structure is disposed in the first chip and between the staggered portions and the bonding interface. The first via structure in the first chip stops at the first metal structure. The first via structure includes a first via metal and a first via dielectric layer. A surface roughness of the staggered portions is substantially greater than a surface roughness of the first via dielectric layer. The second via structure extends from the first via structure to the second metal structure.