Semiconductor Chip Bump Structure for Reliable RDL Vias
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Solution Overview
Problem
The reliability of vias in redistribution layers on semiconductor chips is compromised due to incomplete coverage and uneven surfaces, leading to reduced area for forming vias and potential electrical connection failures.
Innovation Solution
A semiconductor chip design featuring a semiconductor substrate with an insulation layer and bumps that include interconnected first portions within via holes and a second portion interconnecting these, ensuring a flat upper surface for enhanced via reliability and increased area coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a bump is used as a substrate for forming vias, then the area for via formation is limited by the bump surface area, but the bump surface is uneven and curved which reduces via reliability
Solution Approach 1:
The bump is divided into multiple segments: the original bump body and additional bump portions formed around the via holes. This segmentation allows the via holes to be formed in controlled positions while the additional bump portions provide flat surfaces for via formation, resolving the contradiction between limited area and surface unevenness.
Solution Approach 2:
The invention transitions from a two-dimensional surface problem to a three-dimensional solution by forming additional bump portions that extend around the via holes. This dimensional change creates new flat surfaces in different spatial locations, providing adequate area for via formation while maintaining surface flatness.
2Reliability
If vias are formed on a curved bump surface, then via formation area is constrained, but forming vias on uneven surfaces leads to incomplete coverage and connection failures
Solution Approach 1:
The additional bump portions are formed in advance around the via hole positions before the vias are formed. This preliminary action creates predetermined flat surfaces that ensure complete via coverage and reliable electrical connections, while also increasing the total area available for via formation.
Solution Approach 2:
The additional bump portions act as intermediary structures between the original bump and the vias. These intermediary portions provide the necessary flat surfaces and mechanical support, ensuring complete via coverage and reliable electrical connections while increasing the effective via formation area.
3Ease of manufacture
If the bump surface is left as-is, then no additional processing is needed, but the curved and uneven surface prevents reliable via formation
Solution Approach 1:
The invention changes the physical parameters of the bump structure by adding bump portions with different heights and positions. This parameter change transforms the original curved surface into a structure with multiple flat surfaces, enabling reliable via formation while maintaining manufacturing feasibility through standard semiconductor processing techniques.
Data Source
AI summary
A semiconductor chip includes a semiconductor substrate, an insulation layer positioned on the semiconductor substrate and that includes a plurality of via holes, and a bump positioned within the plurality of via holes and on the insulation layer. Portions of the bump positioned within the plurality of via holes are connected to each other.