Chip Capacitor Segmented Electrodes for POP Soldering
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Solution Overview
Problem
In package-on-package (POP) bonding, the Sn plated layers on chip capacitor terminal electrodes melt during reflow soldering, causing a reduction in solder wettability on the packaging board side, leading to poor bonding and connection issues due to exposure of underlying metal layers like nickel, which reduces solder wettability and bonding efficiency.
Innovation Solution
The terminal electrodes of the chip capacitor are designed with a separated plated film configuration, where one portion is on the wiring board side and another on the packaging board side, ensuring that the Sn plating material does not flow to the wiring board side, maintaining sufficient wettability and bonding on the packaging board side.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a chip capacitor is mounted on a wiring board and connected to another package through POP bonding, then electrical connection between packages is achieved, but the Sn plated layer on the terminal electrode flows during reflow soldering, reducing solder wettability on the packaging board side
Solution Approach 1:
The terminal electrode is divided into two separate portions: a first terminal electrode portion on the wiring board side and a second terminal electrode portion on the packaging board side. This segmentation prevents the Sn plated layer from flowing between portions during reflow soldering, maintaining solder wettability on the packaging board side while still achieving electrical connection through the capacitor element.
Solution Approach 2:
The capacitor element serves as an intermediary component between the wiring board and packaging board. By mounting the chip capacitor on the wiring board and connecting it to the packaging board, electrical connection is achieved while the separated terminal electrode portions prevent solder contamination and maintain wettability.
2Device complexity
If the chip capacitor uses a single terminal electrode connected to both packages, then electrical connection is simplified, but the plated film cannot maintain sufficient wettability on the packaging board side due to Sn flow during soldering
Solution Approach 1:
The terminal electrode is segmented into two distinct portions with separate plated films. This segmentation increases structural complexity but ensures that each portion maintains its own plated layer integrity, preventing Sn flow and maintaining bonding quality on both sides.
3Strength
If reflow soldering is performed to mount the chip capacitor, then secure bonding is achieved, but the heat causes Sn in the plated layer to melt and flow, exposing underlying metal layers and reducing wettability
Solution Approach 1:
By segmenting the terminal electrode into separate portions, each with its own plated film, the invention allows reflow soldering to proceed without causing plated layer flow between portions. The segmentation creates physical barriers that maintain plated layer integrity while still achieving strong bonding through proper soldering processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures secure bonding of the chip capacitor to the packaging board by maintaining optimal solder wettability, preventing poor connections and ensuring reliable electrical connections.
Implementation Method 1
the Sn plated layers on chip capacitor terminal electrodes melt during reflow soldering
Implementation Method 2
the terminal electrodes are bonded to the pads by melting the solder through reflow soldering
Data Source
AI summary
A wiring board to be used with being mounted on a packaging board includes a chip component surface-mounted on a surface facing the packaging board. The chip component includes terminal electrodes at both end portions of the component body thereof. Each of the terminal electrodes is provided in a form in which a plated film (Sn) formed on the surface of the terminal electrode is separated into two portions, one portion being on the wiring board side, and another portion being on the packaging board side. In one aspect, each of the terminal electrodes of the chip component is separated into a portion on the wiring board side and a portion on the packaging board side, and the plated film (Sn) is formed on a surface of each of the separated portions of each of the terminal electrodes.