Chip Solid Electrolytic Capacitor Stepped Terminal Adhesion
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Solution Overview
Problem
Conventional chip type solid electrolytic capacitors are prone to detachment from Printed Circuit Boards (PCBs) due to external impacts, leading to malfunction, as the anode and cathode terminals lack sufficient adhesive strength after the molding process.
Innovation Solution
The capacitors feature stepped-down surfaces on their lower terminals, which are covered by an outer resin during the molding process, enhancing the adhesion strength and protecting against external impacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional terminals are used without stepped-down surfaces, then the manufacturing process is simple, but the adhesion strength of terminals to PCB is insufficient causing detachment under external impacts
Solution Approach 1:
The terminal structure is segmented into multiple levels with stepped-down surfaces, creating distinct adhesive interfaces between the terminal, resin, and PCB. This segmentation increases the bonding surface area and creates mechanical interlocking, thereby improving adhesion strength without significantly complicating the overall manufacturing process.
Solution Approach 2:
The terminal structure transitions from a flat two-dimensional interface to a three-dimensional stepped structure. This dimensional change creates multiple bonding planes and increases the effective bonding area, enhancing adhesion strength while maintaining manufacturing feasibility through standard molding processes.
2Strength
If terminals are made with larger bonding area to improve adhesion, then adhesion strength increases, but the volume of the capacitor increases reducing miniaturization benefits
Solution Approach 1:
The stepped-down surfaces are applied locally only to the terminal regions that require enhanced adhesion, rather than increasing the overall capacitor volume. This localized structural modification concentrates the bonding enhancement where needed (at the terminal-resin-PCB interface) while maintaining the compact size of the main capacitor body.
Data Source
AI summary
A chip type solid electrolytic capacitor, in which a PCB includes anode and cathode connection lands formed on upper parts of an insulation board, and anode and cathode terminals formed on lower parts of the insulation board. The anode and cathode terminals are electrically connected to the anode and cathode connection lands, respectively, through vias. An anode connection member is formed on the anode connection land. A capacitor device having an anode lead and a cathode layer is mounted on the PCB with the anode lead weld-connected to the anode connection member and the cathode layer electrically connected to the cathode connection land via a conductive adhesive. An outer resin covers side and upper parts of the PCB including the capacitor device. The anode terminal and the cathode terminal have stepped-down surfaces which are formed along at least parts of peripheral portions thereof, respectively, and covered by the outer resin.