Chip on Carrier Package with Galvanic Body for Delamination Prevention

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Solution Overview

Problem

Conventional chip packaging methods lack reliability and efficiency, particularly in terms of adhesion and mechanical integrity, which can lead to delamination under mechanical pressure or operation.

Innovation Solution

A packaging architecture that uses a chip carrier and a body made of different materials, where the materials are selected for specific functions and processed through galvanic deposition, with surface roughening to enhance adhesion, and encapsulation by a laminate to prevent delamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional packaging methods are used, then manufacturing simplicity is maintained, but adhesion reliability deteriorates leading to delamination under mechanical pressure

Engineering Contradiction:

Improveadhesion reliabilityVSAvoidmanufacturing simplicity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by modifying the surface properties of the chip carrier through roughening treatment. This changes the surface topology parameter to increase surface area and mechanical interlocking capability, thereby improving adhesion reliability without fundamentally changing the manufacturing process flow

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs composite materials by combining the chip carrier made of a first material with a body made of a second material that differs from the first material. This material differentiation allows optimization of each component for its specific function while maintaining overall manufacturing feasibility through established multi-material joining techniques

Inventive Principle:

Principle #40Composite materials

2Ease of manufacture

If materials are selected for specific functions with galvanic deposition, then processability and adhesion are improved, but device complexity increases

Engineering Contradiction:

ImproveprocessabilityVSAvoiddevice complexity

Core Design Contradiction:

Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent applies local quality by using different materials for different components (chip carrier vs. body) and applying galvanic deposition specifically where needed. This allows each part to have material properties optimized for its local function while avoiding unnecessary complexity throughout the entire device

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent replaces mechanical fastening or simple adhesive bonding with galvanic deposition, which provides metallurgical bonding through electrochemical processes. This substitution improves processability and adhesion strength while the deposition process itself is well-established in manufacturing, limiting the increase in device complexity

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Strength

If surface roughening is applied, then adhesion strength is enhanced, but manufacturing steps increase

Engineering Contradiction:

Improveadhesion strengthVSAvoidmanufacturing steps

Core Design Contradiction:

StrengthVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing surface roughening of the chip carrier before mounting the body. This preparatory step creates an optimized surface topology in advance that enhances subsequent adhesion, allowing the roughening to be integrated into existing manufacturing sequences without adding significant complexity

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly improves the reliability and processability of the package by ensuring strong adhesion between the chip carrier, body, and semiconductor chip, preventing delamination and enhancing mechanical integrity during lamination and operation.

Implementation Method 1

a first material of the chip carrier and a second material of the body defining the cavity thereon are different from one another... the first material may be freely selected to serve as a proper basis for (in particular galvanically) depositing the second material thereon

Methodology Applied

Scientific EffectGalvanic deposition: Electroplating

Implementation Method 2

a laminate encapsulating at least one of at least part of the chip carrier, at least part of the body and at least part of the semiconductor chip

Methodology Applied

Scientific EffectLamination: Lamination

Data Source

PatentUS10522433B2Laminate package of chip on carrier and in cavity

Publication Date: 2019.12.31 INFINEON TECHNOLOGIES AG

AI summary

A package which comprises a chip carrier made of a first material, a body made of a second material differing from the first material and being arranged on the chip carrier so as to form a cavity, a semiconductor chip arranged at least partially in the cavity, and a laminate encapsulating at least one of at least part of the chip carrier, at least part of the body and at least part of the semiconductor chip.