Neural Network Chip Compression Mapping for Low-Power Computing
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Solution Overview
Problem
Existing neural network processing systems rely on CPUs or GPUs, leading to high power consumption and computation inefficiencies due to the need for extensive data transmission and processing.
Innovation Solution
An integrated circuit chip device with a primary processing circuit and k branch circuits, each equipped with basic processing circuits and a compression mapping circuit, which compresses data before transmission and processing, reducing the computational and power requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If neural network operations are performed using CPU or GPU, then the processing capability is sufficient, but power consumption is high and computation efficiency is low
Solution Approach 1:
The processing system is segmented into multiple basic processing circuits (BPCs) organized in parallel, with each BPC handling specific neural network operations. This segmentation enables distributed computation, reducing the burden on single processing units and improving overall computation efficiency while managing power consumption through selective activation of processing units.
Solution Approach 2:
The patent introduces a novel architectural dimension by organizing processing circuits in a hierarchical parallel structure with primary processing circuits coordinating multiple basic processing circuits. This dimensional reorganization transforms the traditional sequential or simple parallel processing into a multi-level parallel architecture, significantly improving computation efficiency for neural network operations.
2Reliability
If data is transmitted and processed extensively in neural network operations, then computation accuracy is maintained, but transmission resources and computing resources are consumed
Solution Approach 1:
The compression mapping circuit extracts and removes redundant information from data before transmission and processing. By identifying and eliminating unnecessary data elements, the system maintains computation accuracy for essential information while significantly reducing transmission resources and computing resources required for handling complete datasets.
Solution Approach 2:
The system discards redundant or less important data through compression mapping, then recovers essential information through selective processing in basic processing circuits. This approach maintains computation accuracy for critical data while minimizing resource consumption by not transmitting or processing unnecessary information.
3Loss of energy
If compression mapping circuit is used to compress data, then transmission resources and computing resources are saved, but device complexity increases
Solution Approach 1:
Compression mapping is performed as a preliminary action before data enters the main processing pipeline. By pre-compressing data and removing redundancies upfront, the system reduces the volume of data requiring subsequent transmission and processing, thereby saving resources without significantly increasing the complexity of core processing circuits.
Solution Approach 2:
The compression mapping circuit acts as an intermediary component between data sources and basic processing circuits. This intermediary performs compression and filtering functions, reducing data volume before it reaches the main processing architecture, thereby resource efficiency while isolating the complexity of compression algorithms from the core processing units.
Data Source
AI summary
The present disclosure provides an integrated circuit chip device and a related product. The integrated circuit chip device includes: a primary processing circuit and a plurality of basic processing circuits. The primary processing circuit or at least one of the plurality of basic processing circuits includes the compression mapping circuits configured to perform compression on each data of a neural network operation. The technical solution provided by the present disclosure has the advantages of a small amount of computations and low power consumption.