Stacked Chip Contact Pad Bonding with Low-Temperature Pre-Alignment

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Solution Overview

Problem

In the field of semiconductors, the alignment of stacked chips during bonding is challenging due to vibrations or external forces, leading to slippage and increased manufacturing difficulty.

Innovation Solution

A semiconductor structure and manufacturing method that involve a first chip and a second chip, each with conductive connection wires and contact pads. The contact pads include a conductor group and a connection group with different melting points, allowing for pre-connection at a lower temperature and reliable bonding at a higher temperature, thereby ensuring accurate alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If chips are bonded through interconnection of metal pads on the chips, then electrical connection is achieved, but alignment precision deteriorates due to slippage from vibration or external force

Engineering Contradiction:
Improveelectrical connectionVSAvoidalignment
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by first bonding the connection groups (made of low-melting-point material) at a lower temperature before the final high-temperature bonding process. This preliminary bonding creates a temporary mechanical lock between stacked chips that prevents slippage during subsequent handling and alignment operations, thereby maintaining alignment precision while achieving reliable electrical connection.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by employing materials with different melting points for different functional groups. The connection groups use low-melting-point materials (e.g., solder) that can be bonded at lower temperatures to provide mechanical stability, while the conductor groups use high-melting-point materials (e.g., copper, tungsten) for final high-temperature bonding. This differential melting point approach enables staged bonding that addresses both alignment precision and electrical connection reliability.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If stacked chips are transferred before bonding, then assembly is enabled, but slippage occurs due to vibration or external force, increasing manufacturing difficulty

Engineering Contradiction:
ImproveassemblyVSAvoidmanufacturing difficulty
Core Design Contradiction:
Ease of operationVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by performing low-temperature bonding of connection groups before chip transfer operations. This preliminary bonding creates sufficient mechanical adhesion to prevent slippage during transfer, enabling easy assembly operations without increasing manufacturing difficulty. The staged approach allows chips to be transferred and repositioned after preliminary bonding but before final high-temperature bonding.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent exploits phase transitions by utilizing the melting and solidification characteristics of low-melting-point materials in the connection groups. During low-temperature bonding, these materials melt and then solidify to create a temporary bond that provides mechanical stability during transfer operations. The phase transition enables controlled bonding that facilitates ease of operation without compromising manufacturing ease.

Inventive Principle:
Principle #36Phase transitions

3Device complexity

If single-temperature bonding is used, then process simplicity is maintained, but reliable bonding cannot be achieved due to conflicting material requirements

Engineering Contradiction:
Improveprocess simplicityVSAvoidbonding
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies segmentation by dividing the bonding process into two distinct stages: low-temperature bonding for connection groups and high-temperature bonding for conductor groups. This segmentation allows each stage to be optimized for its specific material requirements, achieving reliable bonding for both low-melting-point and high-melting-point materials. The segmented approach manages process complexity by creating clear, sequential steps rather than attempting a single-temperature solution.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by assigning different material properties to different functional groups within the contact pad structure. Connection groups use low-melting-point materials optimized for low-temperature bonding, while conductor groups use high-melting-point materials optimized for high-temperature bonding. This local differentiation of material quality enables reliable bonding across diverse material types by tailoring bonding conditions to each group's specific requirements.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The described solution improves the alignment and bonding of semiconductor chips, reducing manufacturing difficulties and enhancing the performance of the semiconductor structure by preventing slippage and ensuring reliable electrical connections.

Implementation Method 1

a melting point of the first conductor group is higher than a melting point of the first connection group

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 2

a melting point of the first conductor group is higher than a melting point of the first connection group

Methodology Applied
Scientific EffectThermal stability:

Data Source

PatentUS12211813B2Semiconductor structure and manufacturing method thereof
Publication Date: 2025.01.28 CHANGXIN MEMORY TECH INC
  • US12211813B2 patent drawing
  • US12211813B2 patent drawing
  • US12211813B2 patent drawing

AI summary

The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip, where a first conductive connection wire of the first chip is connected to a first conductive contact pad, a second conductive connection wire of the second chip is connected to a second conductive contact pad, the first conductive contact pad includes a first conductor group and a first connection group, and the second conductive contact pad includes a second conductor group and a second connection group.