Semiconductor Chip Corner Thinning for Adhesive Interface Stress
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Solution Overview
Problem
Semiconductor devices face reliability issues during temperature cycle tests due to stress at the interface between the semiconductor chip and conductive adhesive material, leading to thermal resistance defects, with existing solutions either compromising flexural strength or increasing ON-resistance.
Innovation Solution
The solution involves forming thin portions at the corner portions of the semiconductor chip, which are thinner than the rest of the chip, to reduce stress at the interface with the conductive adhesive material, thereby preventing cracks and maintaining flexural strength while minimizing ON-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of the semiconductor chip is reduced to reduce stress at the interface, then the stress at the interface is reduced, but the flexural strength of the semiconductor chip decreases
Solution Approach 1:
The patent applies local quality by forming thin portions only at the corner portions of the semiconductor chip where stress concentrates during temperature cycle tests. The thickness of these thin portions is smaller than the thickness of the main body, creating a local stress relief zone without compromising the overall structural integrity and flexural strength of the chip. This selective thinning addresses the interface stress problem only where it is most critical.
2Reliability
If the thickness of the conductive adhesive material is increased to reduce stress at the interface, then the stress at the interface is reduced, but the ON-resistance of the semiconductor device increases
Solution Approach 1:
The patent applies local quality by concentrating the stress relief function at the corner portions through thin portions, rather than uniformly increasing the conductive adhesive material thickness across the entire chip. This localized approach reduces stress only where needed at the corners, avoiding the need to increase adhesive thickness elsewhere, thereby preventing ON-resistance increase while still improving interface stress resistance.
3Reliability
If the thickness of the semiconductor chip is reduced to reduce stress at the interface, then the stress at the interface is reduced, but the risk of wafer cracking during transportation increases
Solution Approach 1:
The patent applies local quality by forming thin portions only at the corner portions of the semiconductor chip where stress concentrates during temperature cycle tests. The thickness of these thin portions is smaller than the thickness of the main body, creating a local stress relief zone without compromising the overall structural integrity and flexural strength of the chip. This selective thinning addresses the interface stress problem only where it is most critical.
Data Source
AI summary
A semiconductor device includes a chip mounting portion and a semiconductor chip provided on the chip mounting portion via a conductive adhesive material. Here, a planar shape of the semiconductor chip is a quadrangular shape. Also, in plan view, a plurality of thin portions is formed at a plurality of corner portions of the semiconductor chip, respectively. Also, the plurality of thin portions respectively formed at the plurality of corner portions of the semiconductor chip is spaced apart from each other. Further, thickness of each of the plurality of thin portions is smaller than a thickness of the semiconductor chip other than the plurality of the thin portions.