Chip Crack-Stop Ring Layout for Dicing Crack Prevention
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Solution Overview
Problem
Existing dual-rail or multi-rail crack-stop ring structures in semiconductor chips occupy a large chip area and are not cost-effective, while also failing to adequately prevent crack propagation during the wafer dicing process.
Innovation Solution
A semiconductor chip design featuring a peripheral crack-stop structure surrounding the transistor region and corner crack-stop structures at chip corners, connected in a non-perpendicular manner, formed from metal layers in a dielectric stack, reducing the overall chip area required and enhancing crack prevention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dual-rail or multi-rail crack-stop ring structure is used around the periphery and corners of the transistor region, then crack propagation is prevented, but the chip area occupied increases
Solution Approach 1:
The crack-stop ring structure is segmented into two distinct components: a peripheral crack-stop structure positioned along the four sides of the transistor region, and corner crack-stop structures positioned at the four corners. This segmentation allows each component to be optimized independently and reduces the total area compared to a continuous dual-rail structure.
Solution Approach 2:
Different crack-stop structures are applied at different locations based on local stress conditions. The peripheral crack-stop structure uses a single rail design along the sides where stress is distributed, while corner crack-stop structures use a dual-rail design at the corners where stress concentration occurs during dicing. This local differentiation prevents over-engineering in low-stress areas while maintaining protection in high-stress areas.
2Reliability
If a dual-rail or multi-rail crack-stop ring structure is used, then crack propagation is prevented, but manufacturing cost increases
Solution Approach 1:
Instead of implementing a full dual-rail structure around the entire periphery, the invention applies partial action by using single-rail peripheral structures combined with dual-rail corner structures. This provides sufficient crack protection at the most vulnerable locations (corners) while reducing manufacturing complexity and cost in the peripheral regions.
3Reliability
If corner crack-stop structures and peripheral crack-stop structures are connected in a non-perpendicular manner forming a closed area, then crack propagation is more effectively stopped, but structural complexity increases
Solution Approach 1:
The corner crack-stop structures are designed with predetermined orientations that connect to the peripheral crack-stop structures at specific angles. This preliminary design of connection geometry ensures that cracks are deflected and stopped before they can propagate through the transistor region, while maintaining a systematic and manufacturable structure.
Data Source
AI summary
The invention discloses a semiconductor chip, which includes: a transistor region; and a crack-stop ring structure, which is arranged around the transistor region, wherein the crack-stop ring structure includes a peripheral crack-stop structure surrounding the transistor region along four sides of the semiconductor chip. The corner crack-stop structure is provided only at the corner of the semiconductor chip. The corresponding angles of the corner crack-stop structure and the peripheral crack-stop structure are both right angles. The corner crack-stop structure and the peripheral crack-stop structure are connected to each other in a non-perpendicular manner, thereby forming a closed area at the chip corner.