Chip Debug Control Using Counter Thresholds for Transient Data Capture
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Solution Overview
Problem
Current system debugging methods in chips are inefficient due to the need to iteratively switch between function and scan modes, requiring multiple clock cycles to obtain transient data, which can lead to incorrect debug directions and increased hardware costs.
Innovation Solution
An apparatus and method using counters and determination circuits to suspend chip execution at a designated state by setting thresholds for execution times and clock cycles, allowing for quicker capture of transient data associated with errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If iterative switching between function mode and scan mode is used to obtain transient data, then debug information can be obtained, but debugging time is significantly increased
Solution Approach 1:
The patent applies preliminary action by pre-configuring break condition parameters (such as cycle count thresholds, event occurrence counts, or specific state conditions) into the debug apparatus before execution. The apparatus then automatically suspends the processor when these pre-set conditions are met during normal operation, eliminating the need for iterative mode switching and directly capturing transient data at the precise moment of interest.
2Measurement precision
If trace buffers are added to capture execution data, then transient data can be obtained, but hardware cost increases significantly
Solution Approach 1:
The patent implements multi-functionality by designing a debug apparatus that can operate in multiple modes using the same hardware resources. The apparatus can suspend the processor based on various break conditions (cycle-based, event-based, or state-based) and can capture data either in function mode or scan mode, making the hardware versatile and avoiding the need for separate dedicated trace buffer structures.
Solution Approach 2:
The debug apparatus utilizes the processor's own operational characteristics (execution cycles, event signals, state transitions) to trigger data capture. Instead of requiring external trace buffers to continuously monitor and store all execution data, the system serves itself by automatically identifying and capturing only the relevant transient data when break conditions are met, reducing hardware requirements.
3Measurement precision
If scan chain is used to dump information, then chip state can be analyzed, but multiple clock cycles are required to obtain complete transient data
Solution Approach 1:
The patent applies the skipping principle by enabling the debug apparatus to capture transient data directly during normal processor operation without requiring the processor to slow down or pause for extended periods. The apparatus monitors and captures data at specific break conditions while the processor continues executing, then suspends only momentarily for data extraction, thereby rushing through the data capture process efficiently without complete operational interruption.
Data Source
AI summary
An apparatus and a method for performing debug control in a chip are provided, wherein the apparatus includes a first counter, a first determination circuit, a second counter and a second determination circuit. The first counter counts a number of execution times of a specific system request in the chip to generate a first counting result, and the first determination circuit generates a first determination result according to the first counting result. The second counter counts a number of cycles of an execution clock to generate a second counting result, and the second determination circuit generates a second determination result according to the second counting result. When the first determination result indicates that the first counting result reaches a first threshold and the second determination result indicates that the second counting result reaches a second threshold, execution of the chip is suspended at a breakpoint state.