Chip Die ID Reading Circuit with Damage Detection Switch
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Solution Overview
Problem
Existing methods for reading a die ID from a chip fail when the processor, such as a CPU, MCU, or logic circuit, is not capable of operating properly, preventing the retrieval of essential chip information like manufacturer, production date, and coordinates.
Innovation Solution
A reading circuit that includes a chip damage detection circuit and a switch selector, which detects processor functionality and connects either the processor or an external maintenance device to a fuse controller to read the die ID, ensuring the ID can be retrieved even if the processor is malfunctioning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the processor (CPU, MCU, DSP, or logic circuit) is used to read the die ID from the fuse device, then the die ID can be read under normal operating conditions, but the die ID cannot be read when the processor is not capable of operating properly
Solution Approach 1:
A switch selector is introduced as an intermediary component between the processor and the fuse controller. The switch selector detects whether the processor is operating properly and automatically selects the appropriate control path: connecting the processor to the fuse controller when normal, or connecting an external maintenance device to the fuse controller when the processor is malfunctioning. This intermediary resolves the contradiction by enabling reliable die ID reading across both normal and abnormal operating conditions.
Solution Approach 2:
The system dynamically adjusts its control architecture based on processor status. The chip damage detection circuit continuously monitors processor functionality and dynamically switches the control path through the switch selector. This dynamic adaptation allows the system to maintain die ID reading capability whether the processor is operating normally or has failed, thereby improving reliability without sacrificing adaptability.
2Reliability
If a chip damage detection circuit and switch selector are added to enable reading when processor fails, then die ID reading reliability is improved, but device complexity increases
Solution Approach 1:
The switch selector serves as a compact intermediary that consolidates multiple control paths into a single selection mechanism. Rather than creating separate complex reading circuits for normal and abnormal conditions, the switch selector provides a unified interface that automatically routes control signals based on processor status. This approach improves reliability while minimizing the increase in device complexity through efficient use of the intermediary component.
Solution Approach 2:
The switch selector is designed as a multi-functional component that performs both normal operation control and failure recovery control through a single device. It universally handles both scenarios (processor normal and processor failed) by selecting the appropriate control path, thereby improving reliability without requiring separate dedicated circuits for each scenario. This multi-functionality reduces the overall complexity compared to having separate specialized circuits.
Data Source
AI summary
A reading circuit for a die ID in a chip is provided. The reading circuit includes a chip damage detection circuit, a switch selector, a fuse controller, and a fuse device, where the fuse device stores the die ID; the fuse controller reads the die ID from the fuse device; the chip damage detection circuit detects whether a processor in the chip is capable of operating properly, so as to obtain a detection result, and notify the switch selector of the detection result; and when the detection result is that the processor is capable of operating properly, the switch selector connects the processor and the fuse controller; and when the detection result is that the processor is not capable of operating properly, the switch selector connects the fuse controller and a maintenance device that is located outside the chip.