Semiconductor Chip Edge Coating to Prevent Cracks and Shorts

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor devices are prone to cracks and short defects due to the expansion of the chip's outer perimeter edge when lead ions reach the surface, especially under thermal stress, as they lack a protective coating over this edge.

Innovation Solution

A semiconductor device design that includes a conductive member, a solder layer, a chip, an insulative coating film with a first covering part covering the chip's outer perimeter edge, an insulating part, and a sealing resin, which enhances moisture resistance and strength, and a manufacturing method that forms the coating film during the dicing process to prevent ionization and cracking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the chip is left without a coating film on its outer perimeter edge, then the manufacturing process is simpler, but the chip is prone to cracks and short defects due to expansion under thermal stress

Engineering Contradiction:
Improvechip reliabilityVSAvoidcoating film structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The coating film is applied selectively only to the outer perimeter edge region of the chip's upper surface, rather than covering the entire surface. This localized coating approach provides protection where it is most needed (at the vulnerable edge) while minimizing the overall complexity and material usage.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The coating film is formed on the chip's outer perimeter edge before the chip is mounted and before thermal stress occurs during operation. This preliminary protective action ensures that the edge is already protected when it is most vulnerable to expansion-induced cracking during subsequent thermal cycling.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a coating film is added to cover the chip's outer perimeter edge, then crack formation is suppressed, but the device structure becomes more complex

Engineering Contradiction:
Improvechip reliabilityVSAvoidcoating film structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The coating film is applied selectively only to the outer perimeter edge region of the chip's upper surface, rather than covering the entire surface. This localized coating approach provides protection where it is most needed (at the vulnerable edge) while minimizing the overall complexity and material usage.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If the outer perimeter edge of the chip is not covered, then the manufacturing process is easier, but lead ions can reach the surface causing expansion and short defects

Engineering Contradiction:
Improvemanufacturing easeVSAvoidlead ion exposure
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The coating film is applied selectively only to the outer perimeter edge region of the chip's upper surface, rather than covering the entire surface. This localized coating approach provides protection where it is most needed (at the vulnerable edge) while minimizing the overall complexity and material usage.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The coating film acts as an intermediary barrier layer between the external environment (containing lead ions) and the chip's outer perimeter edge. This intermediate protective layer prevents lead ions from directly reaching and ionizing the chip material, thereby eliminating the harmful effect while maintaining manufacturing simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240249987A1Semiconductor device and method for manufacturing semiconductor device
Publication Date: 2024.07.25 KK TOSHIBA
  • US20240249987A1 patent drawing
  • US20240249987A1 patent drawing
  • US20240249987A1 patent drawing

AI summary

A semiconductor device includes a conductive member, a solder layer, a chip, a coating film, an insulating part, and a sealing resin. The solder layer is located on the conductive member. The chip is located on the solder layer. The coating film is insulative. The coating film is located on the chip. The coating film includes a first covering part. The first covering part covers an outer perimeter edge of an upper surface of the chip. The insulating part is located on the coating film. The sealing resin seals the solder layer, the chip, the coating film, and the insulating part.