Chip on Film Package Graphite Sheet Heat Dissipation
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Solution Overview
Problem
Conventional chip-on-film packages face challenges in heat dissipation due to air gaps between the heat dissipation sheet and the chip, leading to reduced reliability and efficiency, as the trapped air expands and conducts heat poorly.
Innovation Solution
A chip-on-film package design incorporating a graphite sheet that partially covers the chip, with strategically aligned edges and optional openings to maximize contact area and allow air/moisture discharge, combined with an adhesive layer and a back graphite sheet for enhanced thermal conductivity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a heat dissipation sheet is attached to cover the chip, then heat dissipation efficiency is improved, but air gaps form between the sheet and chip causing reliability degradation
Solution Approach 1:
The patent changes the material parameter from conventional heat dissipation sheet to graphite sheet, which has superior thermal conductivity and flexibility. This allows the graphite sheet to conform to the chip surface and eliminate air gaps while maintaining excellent heat dissipation performance, thus resolving the contradiction between heat dissipation efficiency and reliability
Solution Approach 2:
The patent uses a composite structure combining graphite sheet with adhesive layer and optional underfill material. This composite approach ensures tight attachment between the heat dissipation component and chip, eliminating air gaps that would compromise reliability while maintaining effective heat transfer
2Loss of energy
If a heat dissipation sheet is attached to cover the chip, then heat dissipation efficiency is improved, but trapped air expands during thermal processing causing sheet separation
Solution Approach 1:
The patent changes the material from conventional heat dissipation sheet to graphite sheet with superior flexibility and thermal stability. The graphite sheet can accommodate thermal expansion without separating from the chip, maintaining structural stability during thermal processing while preserving heat dissipation efficiency
Solution Approach 2:
The patent applies adhesive layer and optional underfill material before attaching the graphite sheet to the chip. This beforehand cushioning prevents air gap formation and ensures tight attachment that can withstand thermal expansion forces during subsequent thermal processing, preventing sheet separation
3Ease of manufacture
If air gaps exist between chip and heat dissipation sheet, then manufacturing is easier, but heat conductivity is reduced affecting heat dissipation efficiency
Solution Approach 1:
The patent changes from rigid conventional heat dissipation sheets to flexible graphite sheets that can conform to chip surfaces. This flexibility eliminates the need for complex alignment and attachment processes, maintaining manufacturing ease while ensuring intimate contact that maximizes heat conductivity and dissipation efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves heat dissipation efficiency and reliability by maximizing contact area between the graphite sheet and the chip, preventing deformation or separation under high temperature/humidity conditions, and enabling mass production through roll-to-roll manufacturing.
Implementation Method 1
since the heat conductivity of air is rather low, the air trapped in the space between the chip and the heat dissipation sheet would also affect the efficiency for heat generated from the chip to be conducted to the heat dissipation sheet
Data Source
AI summary
A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a graphite sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The graphite sheet covers at least a part of the solder resist layer, wherein an outer edge of the graphite sheet is substantially aligned with an outer edge of the solder resist layer.


