Chip Flank Insulation Using ALD-Coated Singulation Trenches
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Solution Overview
Problem
Existing methods for manufacturing electronic chips with electrically isolating flanks are inefficient and lack effective protection against soldering material during chip mounting.
Innovation Solution
A method involving the formation of trenches on a semiconductor substrate, followed by the deposition of an electrically isolating layer using Atomic Layer Deposition (ALD) on the lateral walls and the substrate's flanks, with optional protective resin and metal connection pads, to isolate the chip flanks effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to deposit isolating material on chip flanks, then some level of protection is achieved, but the process is complex and ineffective against soldering material
Solution Approach 1:
The patent applies preliminary action by forming trenches and depositing the electrically isolating layer on the lateral walls before the actual chip mounting process. This advance preparation ensures that the flanks are protected against soldering material rises before any potential contamination can occur, making the protection more reliable while keeping the process sequence straightforward
Solution Approach 2:
The patent introduces an intermediary element - the electrically isolating layer deposited on the trench lateral walls - that acts as a barrier between the semiconductor substrate and the external environment. This intermediary layer specifically protects against soldering material during mounting, solving the reliability issue without requiring complex multi-step processes
2Reliability
If a thick isolating layer is deposited to ensure complete protection, then protection effectiveness improves, but manufacturing time and cost increase
Solution Approach 1:
The patent applies local quality by concentrating the electrically isolating layer specifically on the lateral walls of the trenches where protection is most needed. Rather than depositing material uniformly across all surfaces, the method targets the critical flank regions, achieving effective electrical isolation in the key areas without the time penalty of complete surface coverage
Solution Approach 2:
The patent uses partial action by depositing the isolating layer only on the lateral walls of the trenches rather than on the entire chip surface. This selective deposition provides sufficient protection for the critical flank regions while significantly reducing the deposition time and material usage compared to complete surface coating
3Reliability
If trenches are formed deep enough to provide adequate isolation, then protection improves, but manufacturing complexity and difficulty increase
Solution Approach 1:
The patent applies partial action by forming trenches that extend only partially through the substrate thickness, rather than creating complete through-holes. The trenches exit at the support film, providing sufficient lateral isolation for the chip flanks while avoiding the manufacturing complexity and difficulty of forming deep through-substrate trenches
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method provides a simple and effective lateral electrical isolation, enhancing chip protection and ease of implementation, while allowing for thin and efficient electrical insulation.
Implementation Method 1
depositing an electrically isolating layer on the lateral walls of the trenches by an ALD deposition method
Data Source
AI summary
The present disclosure relates to a method for manufacturing electronic chips. The method includes forming a plurality of trenches on a first face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed. The trenches delimit laterally a plurality of chips, and each of the chips includes a single integrated circuit. The method further includes electrically isolating flanks of each of the chips by forming an electrically isolating layer on lateral walls of the trenches.