Chip Floorplan Design Using Machine Learning for Cache Coherence
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Solution Overview
Problem
In the design of cache coherent systems, existing methods face challenges in accurately estimating power consumption and area usage, particularly in systems with complex wire routing and high congestion, which is critical for applications in extreme environments where errors are not tolerated.
Innovation Solution
The use of machine learning algorithms to estimate the design of chip floorplans by separating cache coherence functions into distinct units and utilizing a transport network for communication, allowing for independent scaling and efficient bandwidth management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a centralized cache coherent system IP is used as a hub of connectivity, then system coherence is achieved, but wire routing area and congestion increase significantly
Solution Approach 1:
The patent divides the centralized cache coherent system IP into multiple distributed coherence agent IPs, each handling coherence for specific agents. This segmentation distributes the connectivity hub function across multiple smaller units, reducing wire routing congestion and area requirements while maintaining cache coherence functionality through coordinated operation of the distributed agents.
2Measurement precision
If accurate estimation of area and power is performed using traditional methods, then design precision is improved, but computational time and complexity increase
Solution Approach 1:
The patent performs area and power estimation during the floorplanning stage using machine learning models trained on historical design data. This preliminary estimation provides accurate predictions early in the design process, enabling designers to make informed decisions before detailed implementation, thereby reducing the need for time-consuming iterative simulations and measurements later in the design flow.
Solution Approach 2:
The patent replaces traditional simulation-based estimation methods with machine learning-based prediction models. The ML models learn patterns from training data and provide accurate area and power estimates without requiring actual physical or electrical simulations, significantly reducing computational time while maintaining or improving estimation accuracy.
3Measurement precision
If machine learning algorithms are used to estimate floorplan design, then area and power estimation accuracy is improved, but computational resources required for training increase
Solution Approach 1:
The patent employs machine learning algorithms that provide accurate design estimation with optimized computational resource usage. The models are trained on representative subsets of design data and use efficient architectures that balance accuracy requirements with available computational resources, delivering high estimation accuracy without requiring excessive training resources.
Data Source
AI summary
A system and method for estimating a floorplan designs based on feedback to machine learning algorithms to accumulate data for improving future floorplan design estimates and reducing design time.