Chip Design Flow Slicing for ML-Guided QoR and Runtime Control
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Solution Overview
Problem
The challenge in integrated circuit (IC) design is the enormous and impractical total design search space, which requires long execution times and degrades quality of result (QoR) due to inefficient use of machine learning (ML) reward functions, especially in detail routing, leading to increased runtime and suboptimal final designs.
Innovation Solution
The design flow is divided into sub-steps using flow-slicing, allowing for intermediate rewards and ML optimization at each sub-step, enabling dynamic and overlapping execution of sub-steps to reduce computational requirements and improve QoR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the total design search space is searched exhaustively, then complete design optimization is achieved, but runtime becomes impractically long
Solution Approach 1:
The patent divides the total design search space into multiple sub-steps or sub-spaces, each corresponding to a specific design stage or parameter set. Instead of exhaustively searching the entire design space at once, the system performs sequential searches through divided sub-spaces, achieving comprehensive optimization while reducing runtime by processing smaller, manageable segments.
2Reliability
If machine learning reward functions are used for optimization, then design quality improves, but computational requirements increase and degrade performance
Solution Approach 1:
The patent applies segmentation by dividing the computational workload into multiple smaller ML searches executed through different sub-steps. Each sub-step performs a focused ML search with reduced computational requirements compared to a single exhaustive search, while collectively achieving superior design quality through the cumulative effect of multiple optimized decisions.
Solution Approach 2:
The system performs multiple partial searches through sub-spaces rather than one complete exhaustive search. Each sub-step performs a focused search that may not fully optimize all parameters but collectively achieves better overall optimization, trading some individual search depth for increased search breadth across multiple stages.
3Manufacturing precision
If detailed routing optimization is performed, then design precision improves, but runtime increases significantly
Solution Approach 1:
The patent segments the detailed routing optimization into a specific sub-step within the overall design flow. By isolating routing optimization as a distinct phase with its own focused search space and parameters, the system achieves high routing precision without requiring exhaustive searching of all design parameters simultaneously, thereby reducing overall runtime.
Data Source
AI summary
A method includes generating a plurality of intermediate designs for a chip by executing a first sub-step based on a first plurality of inputs, adding at least one intermediate design of the plurality of intermediate designs to a second plurality of inputs, generating a plurality of final designs by executing a second sub-step of the step of the design flow based on the second plurality of inputs, and selecting using a machine learning model a final design from the plurality of final designs. The first sub-step is a sub-step of a step of a design flow and the first plurality of inputs corresponds to input parameters associated with the first sub-step.