Integrated Circuit Individualization Area With Random Inactive Vias
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Solution Overview
Problem
Existing methods for individualizing integrated circuits are sensitive to environmental variations and aging, leading to unreliable identification and potential misclassification of legitimate circuits as counterfeit.
Innovation Solution
A method is developed to create an individualization zone on integrated circuits by intentionally degrading interconnection layers with randomly distributed inactive vias, using a process involving etching, residue formation, and selective filling with conductive material to ensure a unique and stable response pattern.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing individualization methods exploit inherent functional variations of integrated circuits, then unique identification is achieved, but the solution becomes highly sensitive to environmental variations and aging
Solution Approach 1:
The patent applies preliminary action by intentionally creating defects in the interconnection layer during the manufacturing process, before the circuit is put into service. These defects are formed by exposing the metallic hard mask to oxygen and moisture to form randomly distributed residues, then filling openings with conductive material to create inactive vias. This preliminary creation of stable physical variations eliminates the need to rely on environmentally sensitive functional variations that change over time.
Solution Approach 2:
The patent converts the harmful effect of environmental variations and aging into a benefit by creating a physical unclonable function that is inherently stable. Instead of fighting against environmental sensitivity, the invention uses intentional defect formation to create a reference that is immune to such variations. The random residues and resulting inactive vias create a unique fingerprint that remains constant despite temperature, voltage, or aging changes.
2Reliability
If existing methods use inherent functional variations for individualization, then unique identification is possible, but legitimate circuits may be misclassified as counterfeit due to response time changes
Solution Approach 1:
The patent establishes a stable reference pattern through preliminary defect formation during manufacturing. By creating inactive vias with random residues before the circuit operates, the invention establishes a fixed physical unclonable function that serves as a reliable fingerprint. This preliminary action ensures that the reference pattern does not change over time, preventing misclassification of legitimate circuits.
Solution Approach 2:
The patent replaces the mechanical/electrical system based on functional variations (signal propagation times, voltage drops) with a chemical/physical system based on structural defects (inactive vias, residues). This substitution transitions from measuring dynamic electrical characteristics that vary with environment to measuring static physical structures that remain constant, thereby preserving information stability.
3Reliability
If existing individualization solutions are implemented, then unique identification is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the individualization process with the existing manufacturing flow by integrating defect formation into standard steps. The metallic hard mask is exposed to oxygen and moisture during or after the etching process, and the same openings are used for both functional vias and individualization defects. This merging eliminates the need for separate individualization equipment or processes, reducing manufacturing complexity while maintaining robustness.
Solution Approach 2:
The patent applies self-service by allowing the metallic hard mask to naturally form residues when exposed to oxygen and moisture in the environment. This passive process requires no additional equipment or complex control systems - the residues form automatically through chemical interaction between the metal and ambient air. The random distribution of these residues naturally creates the unique fingerprint without requiring complex patterning or control mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method provides a robust and cost-effective solution for unique identification of integrated circuits, resistant to environmental changes and cloning, ensuring stable response patterns over time.
Implementation Method 1
expose the metallic hard mask to oxygen and moisture so as to form randomly distributed residues at the level of certain openings
Implementation Method 2
expose the metallic hard mask to oxygen and moisture so as to form randomly distributed residues
Implementation Method 3
etch the at least one dielectric layer through the mask openings by at least one etch based on a fluorocarbon chemistry
Implementation Method 4
fill the openings with an electrically conductive material so as to form at least the vias of the interconnection level
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3A~3D
AI summary
The invention relates to a method for creating an individualization zone of a microelectronic chip comprising a first (10A) and a second (20A) level of electrical traces (10, 20), and a level (30A) of interconnections including vias (30), the method comprising the following steps: - providing the first level (10A) and a dielectric layer (200, 201, 202), - creating a metallic hard mask (300) on the dielectric layer (200, 201, 202), - etching the dielectric layer (200, 201, 202) through the mask openings (301) by etching using a fluorine-based chemistry, - preferably oxidizing the metallic hard mask (300) by hydrolysis so as to form residues (31) randomly distributed at certain openings (320R), - filling the openings (320, 320R) so as to form the vias (30) of the (30A) level of interconnections,said vias (30) comprising functional vias (30OK) at the level of the openings without residues (320) and inactive vias (30KO) at the level of the openings with residues (320R).