Chip Inductor Multilayer Structure with Protective Insulating Layers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The miniaturization of thin-film inductors poses challenges in maintaining inductance and other chip characteristics without damaging the insulating member during the manufacturing process, particularly due to the thinness and material limitations of existing insulating layers.
Innovation Solution
A chip inductor design featuring a multilayer structure with insulating layers made of epoxy-novolac-based resin and a polyimide insulating member, where the insulating layers are distinct from the insulating member, providing protection against damage and supporting the coil structure with a via connection between top and bottom coils, and using conductive layers like copper plating for enhanced reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the insulating member is made thinner to achieve miniaturization of the chip inductor, then the chip size is reduced, but the insulating member becomes more susceptible to damage during the manufacturing process
Solution Approach 1:
The patent applies beforehand cushioning by forming a protective insulating layer on the surface of the insulating member before the manufacturing process begins. This insulating layer acts as a cushion that prevents damage to the thin insulating member during subsequent manufacturing steps, particularly during dicing and other mechanical processing operations.
Solution Approach 2:
The patent employs composite materials by combining the insulating member with an insulating layer made of different material properties. The insulating layer is formed of a material that provides enhanced mechanical strength and damage resistance while maintaining electrical insulation properties, creating a composite structure that protects the thin insulating member.
2Reliability
If fine patterning with increased number of turns is implemented to maintain inductance in miniaturized chips, then inductance is preserved, but the manufacturing complexity and difficulty increase
Solution Approach 1:
The patent applies another dimension by utilizing the vertical dimension through multiple layers. Instead of only increasing the number of turns in a single plane, the coil pattern is distributed across multiple layers with different heights, allowing fine patterning to be achieved while managing manufacturing complexity through vertical stacking rather than horizontal expansion.
3Reliability
If the pattern height is increased to maintain chip characteristics during miniaturization, then inductance and Rdc are preserved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent applies segmentation by dividing the coil structure into multiple segments located at different heights and layers. This segmentation allows the total pattern height to be distributed across multiple smaller segments, making it easier to control manufacturing precision for each segment while achieving the required total height for maintaining chip characteristics.
Data Source
AI summary
A chip inductor includes a body having a coil and an insulating member on which the coil is disposed, and external electrodes disposed on external surfaces of the body. The insulating layers are disposed on one surface of the insulating member in the body and another surface opposing the one surface, respectively, and are made of a material different from a material of the insulating member. The insulating member and the insulating layers constitute a multilayer structure. The coil includes a top coil and a bottom coil disposed on a top surface and a bottom surface of the multilayer structure, respectively. The top and bottom coils are connected by a via penetrating through the top and bottom surfaces of the multilayer structure.


