Chip-Integrated Antenna Emission Efficiency via Localized Resistivity
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Solution Overview
Problem
Chip-integrated antennas have inferior emission efficiency compared to external antennae, particularly at higher frequencies, limiting their performance in short-range communication systems.
Innovation Solution
A method is developed to fabricate microelectronic devices with integrated antennas by forming a structure or means to limit current circulation in the semiconducting layer, such as using insulating blocks or junctions, to enhance the emission efficiency of the antenna.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If chip-integrated antennas are used to reduce manufacturing cost and eliminate external components, then device integration and cost are improved, but emission efficiency deteriorates
Solution Approach 1:
The patent applies local quality by creating a high-resistivity zone specifically in the semiconducting layer beneath the antenna elements. This localized modification of electrical properties (through insulating blocks or doped regions) allows the antenna to operate with improved efficiency while maintaining overall chip integration. The high-resistivity zone is precisely positioned opposite the antenna conductors to minimize parasitic losses without affecting other chip functions.
2Device complexity
If chip-integrated antennas are used to eliminate external components, then device complexity is reduced, but emission efficiency at high frequencies deteriorates
Solution Approach 1:
The invention introduces a localized high-resistivity zone in the semiconducting layer directly beneath the antenna elements. This localized structural modification (through insulating blocks or selectively doped regions) addresses the high-frequency performance issue without adding external components or increasing overall device complexity. The high-resistivity zone is precisely positioned to minimize parasitic losses while maintaining integration.
3Ease of manufacture
If standard semiconducting layers are used for antenna integration, then manufacturing simplicity is maintained, but current circulation losses increase
Solution Approach 1:
The patent changes the electrical parameter (resistivity) of the semiconducting layer in a specific zone beneath the antenna. This is achieved through parameter modification via insulating blocks or by altering doping concentration to create high-resistivity regions. This parameter change reduces current circulation losses while maintaining compatibility with standard semiconductor manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the emission efficiency of chip-integrated antennae, making them more effective for frequencies above 1 GHz, including those in the ISM band around 24 GHz, suitable for short-range communication devices.
Implementation Method 1
elements are positioned in the semiconducting layer to increase the resistance of this layer in a zone opposite the antenna to improve the emission efficiency of the antenna
Data Source
AI summary
The method is to fabricate a microelectronic device with an integrated antenna. This method may include forming at least a first semiconducting layer on a substrate, forming in at least one zone of the first semiconducting layer of a structure to limit the circulation of current in the zone of the first semiconducting layer, forming a plurality of layers on the semiconducting layer and at least one antenna in the plurality of layers, with the antenna being formed opposite the zone. The antenna may be operable at radio frequencies above 10 GHz, and may have an improved emission efficiency.