Semiconductor Chip Interconnect Thickness Layout for Reflow Warpage
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Solution Overview
Problem
The warpage of semiconductor chips during the reflow process makes it difficult to achieve appropriate connections with the wiring substrate, leading to potential defects in the semiconductor device package structure.
Innovation Solution
The semiconductor device employs conductive connection parts with varying thicknesses on the wiring substrate, specifically thicker conductive connection parts in the chip outer peripheral region to accommodate warpage, ensuring reliable connections despite thermal expansion differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform thickness conductive connection parts are used on the wiring substrate, then the manufacturing process is simple, but the semiconductor chip cannot be appropriately connected due to warpage during reflow process
Solution Approach 1:
The patent applies local quality by making the conductive connection parts have different thicknesses in different regions of the wiring substrate. Specifically, the conductive connection parts in the chip outer peripheral region are made thicker than those in the chip central region, allowing the structure to locally accommodate the warpage of the semiconductor chip during reflow process while maintaining overall connection reliability.
2Reliability
If thicker conductive connection parts are used in the chip outer peripheral region, then warpage accommodation is improved, but the manufacturing precision requirement increases
Solution Approach 1:
The patent applies parameter changes by varying the thickness parameter of the conductive connection parts across different regions of the wiring substrate. The thickness is specifically increased in the chip outer peripheral region compared to the chip central region, creating a gradient structure that accommodates warpage while being manufacturable through controlled parameter variation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively addresses the warpage issue by allowing for appropriate electrical connections between the semiconductor chip and the wiring substrate, even when the chip warps, thereby reducing the likelihood of defects and improving the overall reliability of the semiconductor device.
Implementation Method 1
a first plating layer M1 different in thickness from the chip central region R11 to the chip outer peripheral region R12 is formed
Implementation Method 2
the warpage of the semiconductor chip may make it difficult to appropriately connect the semiconductor chip to the wiring substrate
Data Source
AI summary
A semiconductor device according to the present embodiment includes a substrate and a semiconductor chip. The substrate has a first face and a plurality of conductive connection parts provided on the first face. The semiconductor chip has a second face that faces the first face and a plurality of connection bumps provided on the second face and electrically connected to the plurality of conductive connection parts. The conductive connection part arranged in a chip outer peripheral region of a chip region on the first face where the semiconductor chip is arranged is different in thickness from the conductive connection part arranged in a chip central region of the chip region.