Semiconductor Chip Isolation Groove for High-Density Mounting

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Solution Overview

Problem

Existing semiconductor devices face limitations in achieving high-density mounting while maintaining versatility due to exposed cut surfaces and the need for significant gaps to prevent short circuits, which restricts the arrangement and connection of transistor elements.

Innovation Solution

A semiconductor device configuration featuring first and second semiconductor chips with isolation grooves on a support substrate, allowing for close mounting and electrical connection without encapsulation, enabling free connection of transistor elements and other semiconductor function elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If chip-size-package semiconductor devices are arranged on a mounting substrate, then the mounting density can be increased, but significant gaps must be left between adjoining devices to prevent short circuits due to exposed cut surfaces

Engineering Contradiction:
Improvemounting densityVSAvoidgap requirement
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

An isolation groove structure is introduced as an intermediary element between adjacent semiconductor chips. The groove includes side surfaces that continuously extend from opposing side surfaces of adjacent chips, forming a physical barrier that prevents short circuits while allowing chips to be positioned closer together, thereby increasing mounting density without requiring excessive gaps.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If transistor elements are divided into individual semiconductor chips, then free connection of elements is enabled, but mounting density is reduced due to the need for isolation and connection space

Engineering Contradiction:
Improveconnection flexibilityVSAvoidmounting density
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The isolation structure extends in the vertical dimension with side surfaces that continuously extend from chip side surfaces, rather than only using horizontal spacing. This three-dimensional isolation approach allows chips to be mounted closer in the horizontal plane while maintaining electrical isolation, thus preserving connection flexibility while improving mounting density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If significant gaps are left between semiconductor devices, then short circuits are prevented, but the mounting area is wasted and mounting density cannot be sufficiently increased

Engineering Contradiction:
Improveshort circuit preventionVSAvoidmounting density
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Isolation is applied locally at the interfaces between adjacent chips through the groove structure, rather than requiring uniform gaps around entire devices. The groove's side surfaces provide targeted isolation exactly where needed at chip boundaries, preventing short circuits while minimizing the overall space required for isolation, thus improving mounting density while maintaining reliability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9484324B2Method of manufacturing semiconductor device
Publication Date: 2016.11.01 ROHM CO LTD
  • US9484324B2 patent drawing
  • US9484324B2 patent drawing
  • US9484324B2 patent drawing

AI summary

A semiconductor device includes a first semiconductor chip including a first surface, a second surface and a first terminal arranged on the first surface, a second semiconductor chip including a first surface, a second surface and a second terminal arranged on the first surface of the second semiconductor chip, a support substrate including a first surface bonded to the second surfaces of the first semiconductor chip and the second semiconductor chip, and an isolation groove formed on the first surface of the support substrate. The isolation includes a pair of side surfaces continuously extending from opposing side surfaces of the first semiconductor chip and the second semiconductor chip, respectively, and the isolation groove is formed into the support substrate to extend from the first surface of the support substrate. The isolation groove has a depth less than a thickness of the support substrate.