Semiconductor Chip Layout for Protected Inner-Side Bonding Wires

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Solution Overview

Problem

Bonding wires in semiconductor devices can come into contact with objects and fall down, leading to electrical failures, especially when control electrodes are located at the end portions of ceramic circuit boards.

Innovation Solution

The semiconductor device is designed with semiconductor chips having control electrodes at corner portions and connected by bonding wires that extend on the inner side of the semiconductor unit, reducing the likelihood of contact with external objects and preventing tilting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If control electrodes are located at end portions of ceramic circuit boards, then ease of connection is improved, but bonding wires are more likely to come into contact with external objects and fall down

Engineering Contradiction:
Improveease of connectionVSAvoidbonding wire stability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent moves control electrodes from end portions (one-dimensional positioning) to corner portions (two-dimensional positioning at intersections), changing the spatial arrangement to reduce bonding wire exposure while maintaining connection accessibility

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent proactively prevents bonding wire contact issues by positioning control electrodes at corner portions where bonding wires can be routed through the interior, anticipating and preventing the harmful effect of external contact before it occurs

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If bonding wires are extended to connect control electrodes, then electrical connection is achieved, but bonding wires are more susceptible to contact with external objects

Engineering Contradiction:
Improveelectrical connectionVSAvoidexternal contact
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent nests bonding wires within the semiconductor unit structure by routing them through the interior to connect corner-based control electrodes, protecting them from external environment while maintaining electrical connectivity

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The corner portion configuration acts as an intermediary structure that allows bonding wires to be routed through the interior space, mediating between the need for electrical connection and the need to protect from external contact

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12525569B2Semiconductor device and semiconductor chip
Publication Date: 2026.01.13 FUJI ELECTRIC CO LTD
  • US12525569B2 patent drawing
  • US12525569B2 patent drawing
  • US12525569B2 patent drawing

AI summary

A semiconductor device includes a first semiconductor chip including a plurality of first control electrodes, each of which is disposed at a respective one of corner portions on a first front surface thereof, a first output electrode disposed on the first front surface, and a first input electrode disposed on a first rear surface thereof, a second semiconductor chip including a plurality of second control electrodes, each of which is disposed at a respective one of corner portions on a second front surface thereof, a second output electrode disposed on the second front surface, and a second input electrode disposed on a second rear surface thereof, the second semiconductor chip being disposed adjacent to the first semiconductor chip, and a first connection wire which connects one of the first control electrodes and one of the second control electrodes.