Semiconductor Chip Layout With Coupled Coils for Reliable Signal Transfer

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Solution Overview

Problem

Existing semiconductor devices with magnetically coupled coils for signal transmission between semiconductor chips face reliability issues due to power consumption imbalances and structural constraints.

Innovation Solution

A semiconductor device design featuring three semiconductor chips with magnetically coupled coils, where the second chip has a larger mounting area and higher power consumption, and a specific layout that includes a first and second chip mounting portion, enhancing reliability through optimized coil placement and electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If the second semiconductor chip with higher power consumption is mounted on a larger die pad, then heat dissipation is improved, but the device area increases

Engineering Contradiction:
Improveheat dissipationVSAvoiddevice area
Core Design Contradiction:
TemperatureVSArea of stationary object

Solution Approach 1:

The patent applies local quality by assigning different die pad sizes to different semiconductor chips based on their specific power consumption characteristics. The second die pad is made larger than the first die pad to provide enhanced heat dissipation capacity for the second semiconductor chip that consumes higher power, while the first die pad maintains a smaller size for the lower-power first chip. This localized differentiation optimizes thermal management without unnecessarily increasing the overall device area.

Inventive Principle:
Principle #3Local quality

2Reliability

If coils are placed closer to the chip mounting portion for magnetic coupling, then signal transmission efficiency is improved, but magnetic interference increases

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidmagnetic interference
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent employs asymmetry in the vertical positioning of the two coils relative to their respective die pads. The first coil is positioned at a first distance from the first die pad, while the second coil is positioned at a second distance from the second die pad, where the distances are deliberately made different. This asymmetric arrangement allows each coil to be optimized for its specific function: one prioritizes magnetic coupling efficiency while the other maintains appropriate spacing to reduce magnetic interference, thereby resolving the contradiction between transmission efficiency and interference reduction.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design improves the reliability of signal transmission between semiconductor chips by addressing power consumption imbalances and structural limitations, ensuring efficient and stable operation.

Implementation Method 1

a first coil and a second coil that are magnetically coupled to each other

Methodology Applied
Scientific EffectMagnetic coupling: Electromagnetic Induction

Data Source

PatentUS12469835B2Semiconductor device
Publication Date: 2025.11.11 RENESAS ELECTRONICS CORP
  • US12469835B2 patent drawing
  • US12469835B2 patent drawing
  • US12469835B2 patent drawing

AI summary

A semiconductor device includes: a first chip mounting portion; a second chip mounting portion; a first semiconductor chip mounted on the first chip mounting portion; second and third semiconductor chips mounted on the second chip mounting portion; and a sealing body for sealing them. Here, the third semiconductor chip includes a first coil and a second coil that are magnetically coupled to each other. Also, the first coil is electrically connected with a first circuit formed in the first semiconductor chip, and the second coil is electrically connected with a second circuit formed in the second semiconductor chip. Also, in cross-sectional view, the second coil is located closer to the second chip mounting portion than the first coil. Further, a power consumption during an operation of the second semiconductor chip is greater than a power consumption during an operation of the first semiconductor chip.