Chip-Scale LED Insulation Layout Against Solder Diffusion
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Solution Overview
Problem
Chip-scale package type light emitting diodes face challenges in preventing solder diffusion, which can contaminate the ohmic reflection layer and lead to device failure, due to their complex structure and the need for effective heat dissipation.
Innovation Solution
The design incorporates a substrate with a first and second conductivity type semiconductor layer, an active layer, and insulation layers with strategically positioned openings to prevent solder diffusion, including a mesa structure with indented portions and bump pads to increase the solder's diffusion path, thereby enhancing the light emitting diode's reliability and current spreading capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a flip-chip shape electrode structure is used to achieve excellent heat dissipation characteristics, then heat dissipation performance is improved, but the structure becomes considerably complicated to prevent solder diffusion
Solution Approach 1:
The patent divides the insulation layer into multiple segments (lower insulation layer and upper insulation layer) with separate openings. The lower insulation layer has a first opening for the n-type contact and a second opening for the p-type contact, while the upper insulation layer has corresponding openings. This segmentation allows independent optimization of each opening's position and size, preventing solder diffusion paths while maintaining structural simplicity and effective heat dissipation through the flip-chip electrode structure.
2Device complexity
If the structure is simplified to reduce complexity, then manufacturing becomes easier, but solder diffusion into the ohmic reflection layer cannot be prevented
Solution Approach 1:
The patent introduces an intermediary barrier structure consisting of the lower insulation layer and upper insulation layer with their respective openings. The lower insulation layer is disposed between the substrate and the upper insulation layer, creating multiple intermediate barriers that solder must penetrate. This intermediary approach effectively blocks solder diffusion paths to the ohmic reflection layer while keeping the overall structure simple and suitable for chip-scale packaging.
3Reliability
If openings in the upper insulation layer are separated from those in the lower insulation layer to prevent solder diffusion, then reliability is improved, but the design range is constrained
Solution Approach 1:
The patent utilizes the vertical dimension by stacking the lower insulation layer and upper insulation layer at different height levels. The openings in the upper insulation layer are separated from those in the lower insulation layer both horizontally and vertically, creating a three-dimensional arrangement. This dimensional approach effectively blocks solder diffusion paths while maintaining design flexibility for various LED configurations and applications.
Data Source
AI summary
A chip-scale package type light emitting diode is provided. In the light emitting diode according to one embodiment, an opening exposing a pad metal layer is separated from an opening of a lower insulation layer which exposes an ohmic reflection layer formed on a mesa. Therefore, it is possible to prevent solder, particularly Sn, from diffusing and contaminating the ohmic reflection layer.