Semiconductor Chip Self-Test Logic Chain ISI Detection
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Solution Overview
Problem
In semiconductor chip manufacturing, identifying defective chips early on to reduce production costs is challenging due to the need for various level tests, including process, voltage, and temperature (PVT) tests, and inter-symbol interference (ISI) assessments, which are resource-intensive and costly.
Innovation Solution
A semiconductor chip with a pulse generator, logic chain, and detector that generates and transmits a test pulse through a series of logic devices, detecting the pulse's attenuation to assess ISI, allowing for early identification of defects and reducing unnecessary expenses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If various level tests including PVT and ISI tests are performed on semiconductor chips, then measurement precision and reliability are improved, but production cost and device complexity increase
Solution Approach 1:
The semiconductor chip performs self-testing by generating its own test pulse and detecting its own signal attenuation through integrated logic chains and detectors, eliminating the need for complex external test equipment and reducing production costs
Solution Approach 2:
The test function is extracted as a separate operational mode within the chip, using dedicated test circuits (pulse generator, logic chain, detector) that can be activated independently from normal operation, allowing simplified testing without affecting production complexity
2Productivity
If comprehensive testing is performed on each semiconductor chip, then productivity is improved by reducing defective chip production, but loss of time and use of energy increase
Solution Approach 1:
The test is performed as a periodic or on-demand operation rather than continuous testing, allowing chips to be tested at specific stages (e.g., before packaging) to identify defects without time-consuming continuous monitoring
Solution Approach 2:
The chip structure is prepared in advance with integrated test circuits and logic chains that enable rapid testing when needed, eliminating the need for complex external test setup and reducing testing time
Data Source
AI summary
A semiconductor chip, a test system, and a method of testing the semiconductor chip. The semiconductor chip includes a pulse generator configured to generate a test pulse in response to a test request; a logic chain comprising a plurality of logic devices serially connected to each other and transferring the test pulse sequentially; and a detector configured to detect a logic level of an output signal of each of the logic devices and output a detection result indicating a degree of an inter-symbol interference (ISI).