Chip Memory Programming via Switching Circuit Bypass
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Solution Overview
Problem
Firmware updates for chips are limited by the specific communication interfaces and transmission speeds supported by each chip, restricting flexibility and efficiency in programming operations.
Innovation Solution
A chip design incorporating a power pin, ground pin, I/O pins, readable/writable memory, switching circuit, and control circuit, where the switching circuit can be activated to electrically couple memory ports to mapping pins, allowing direct control and programming without reliance on a specific communication interface or transmission speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If firmware is updated through the chip's communication interface, then the firmware can be updated, but the transmission speed is limited to the communication interface's speed
Solution Approach 1:
The patent segments the programming function from the communication interface by introducing a switching circuit that can bypass the communication interface and directly connect the programming device to the memory ports, allowing high-speed programming independent of the communication interface speed
Solution Approach 2:
The switching circuit acts as an intermediary that can either route signals through the communication interface for normal operation or directly connect the programming device to memory ports for high-speed firmware updates, thus mediating between the two conflicting requirements
2Productivity
If the switching circuit is activated to directly connect memory ports to mapping pins, then programming speed and flexibility improve, but the device complexity increases
Solution Approach 1:
The switching circuit merges the programming function with the existing I/O pin structure, allowing the same pins to serve both as communication interface connections and as direct memory programming connections, thus improving productivity without proportionally increasing device complexity
3Adaptability or versatility
If the switching circuit is activated, then the readable/writable memory can be directly controlled through mapping pins, but the control circuit complexity increases
Solution Approach 1:
The switching circuit is designed to be dynamically controllable, allowing it to switch between connecting the communication interface and directly connecting memory ports based on operational mode, thus providing programming flexibility while keeping the control circuit adaptable rather than permanently complex
Data Source
AI summary
A chip includes a power pin, a ground pin, a plurality of input/output (I/O) pins, a readable/writable memory, a switching circuit, and a control circuit. The I/O pins include a plurality of mapping pins and a control pin. The readable/writable memory includes a clock port, a plurality of I/O ports, and an enable port. The control circuit selectively activates or does not activate the switching circuit according to the control pin. When the switching circuit is activated, the switching circuit electrically couples the clock port, the I/O ports, and the enable port to the mapping pins respectively.