Chip Metallization with Substrate-Embedded Metal for Low-Stress Power Routing
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Solution Overview
Problem
The challenge in chip metallization is to increase the thickness of the metal layer on a chip substrate while minimizing the impact of the dielectric layer thickness, which can cause warping and difficulty in subsequent processes due to excessive thin film stress.
Innovation Solution
A method involving etching the chip substrate to embed dielectric and metal thin films directly into the substrate, allowing flexible control of the metal layer thickness and reducing the dielectric layer thickness, thereby improving power supply and thermal conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the thickness of the dielectric layer is increased to increase the metal layer thickness, then the metal layer thickness is improved, but the wafer warping and process difficulty increase due to large thin film stress
Solution Approach 1:
Instead of depositing a thick dielectric layer and then etching it to embed the metal layer (conventional approach), this patent inverts the sequence by directly etching grooves into the substrate first, then depositing the metal layer into these grooves. This eliminates the need for a thick dielectric layer while achieving the same metal embedding effect, thereby preventing wafer warping and thin film stress issues.
Solution Approach 2:
The patent extracts the dielectric layer from the metallization structure entirely. By etching grooves directly into the substrate and depositing metal into these grooves, the dielectric layer that would normally surround and embed the metal is removed, eliminating the source of thin film stress and wafer warping while maintaining the metal layer's structural integrity.
2Power
If the thickness of the metal layer is increased to improve power supply capability, then the power supply capability is improved, but the dielectric layer thickness must be increased which causes wafer warping
Solution Approach 1:
The patent inverts the conventional metallization sequence by first creating grooves in the substrate and then depositing the metal layer into these grooves. This allows the metal layer to be thick enough for improved power supply capability without requiring a corresponding increase in dielectric layer thickness, thereby preventing the thin film stress that would cause wafer warping.
3Manufacturing precision
If the dielectric layer thickness is increased to embed the metal layer, then the metal layer embedding is improved, but the thin film stress causes wafer warping
Solution Approach 1:
Instead of embedding metal in a dielectric layer (conventional approach), this patent inverts the approach by etching grooves into the substrate first and then depositing metal into these grooves. This achieves precise metal layer embedding without requiring a thick dielectric layer, thereby maintaining wafer stability and preventing thin film stress-induced warping.
Solution Approach 2:
The patent removes the dielectric layer from the embedding structure entirely. By etching grooves directly into the substrate and depositing metal into these grooves, the metal is embedded in the substrate itself rather than in a dielectric layer, eliminating the thin film stress that would compromise wafer stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the power supply and heat dissipation capabilities of the chip by increasing the metal layer thickness while reducing the dielectric layer impact, facilitating subsequent packaging and process difficulty.
Implementation Method 1
a back surface of the chip substrate is etched, a thickness of the chip substrate is a first thickness, and an etching depth is less than the first thickness
Implementation Method 2
the first thin film is deposited on the back surface of the etched chip substrate... the second thin film is deposited on the first thin film... the third thin film is deposited on the second thin film
Data Source
Figure 1~2
Figure 3(a)~3(c)
Figure 3(d)~3(e)
AI summary
This application provides a chip metallization method and a chip. In this application, a dielectric layer does not need to be deposited, and a substrate can be directly etched. In other words, etching is performed in a chip substrate, so that a subsequently deposited metal thin film can be embedded into the chip substrate. Because the chip substrate is usually thick, a thickness of the metal thin film may be flexibly controlled by controlling a thickness of the dielectric layer and a thickness of a barrier layer that are subsequently deposited, so that the thickness of the metal thin film can be increased, and the thickness of the dielectric layer can be reduced as much as possible. This avoids impact of an excessively thick dielectric layer on chip performance, and improves power supply performance of the chip.