Chip Module Carrier With Diffusion Barrier

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Solution Overview

Problem

Current chip module fabrication methods face challenges in effectively connecting semiconductor chips with contact elements to carriers, particularly in ensuring reliable electrical contact and preventing diffusion of solder materials, which can lead to inter-metallic phase formation and reduced reliability.

Innovation Solution

The solution involves using a carrier made of conductive materials like copper or iron/nickel alloys, connected to semiconductor chips via re-flow soldering or conductive adhesives, with a diffusion barrier like a titanium layer to prevent solder diffusion, and forming electrical connectors and insulation layers to facilitate secure and reliable electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If re-flow soldering is used to connect semiconductor chips to carriers, then electrical connection reliability is improved, but solder material diffusion occurs causing inter-metallic phase formation

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidsolder material diffusion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A diffusion barrier layer is introduced as an intermediary between the carrier and the semiconductor chip. This barrier layer prevents solder material from diffusing into the carrier during re-flow soldering, thereby eliminating inter-metallic phase formation while maintaining reliable electrical connections.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The carrier structure employs composite material design with a diffusion barrier layer integrated into the carrier substrate. This composite structure combines the electrical conductivity of the carrier material with the diffusion-blocking properties of the barrier layer, achieving both reliable connection and prevention of harmful diffusion.

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If contact elements are arranged on both main surfaces of semiconductor chips, then connection versatility is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveconnection versatilityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The semiconductor chip is segmented into two functional surfaces: a first main surface with contact elements for carrier connection and a second main surface with contact elements for PCB connection. This segmentation allows each surface to be optimized for its specific connection purpose, achieving versatility while managing manufacturing complexity through clear functional division.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of chip module connections by preventing solder diffusion and ensuring stable electrical contacts, allowing for efficient integration with printed circuit boards while maintaining the integrity of the semiconductor chip and carrier interface.

Implementation Method 1

a diffusion barrier like a titanium layer to prevent solder diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

connected to semiconductor chips via re-flow soldering

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 3

connected to semiconductor chips via re-flow soldering or conductive adhesives

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS8970032B2Chip module and method for fabricating a chip module
Publication Date: 2015.03.03 INFINEON TECHNOLOGIES AG
  • US8970032B2 patent drawing
  • US8970032B2 patent drawing
  • US8970032B2 patent drawing

AI summary

The chip module includes a semiconductor chip having a first contact element on a first main face and a second contact element on a second main face. The semiconductor chip is arranged on a corner in such a way that the first main face of the semiconductor chip faces the carrier. One or more electrical connectors are connected to the carrier and include end faces located in a plane above a plane of the second main face of the semiconductor chip.