Chip Arrangement Optical Verification for Secure Bonding
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Solution Overview
Problem
Current ID chip arrangements in electronic identification documents lack secure bonding to the carrier material, allowing for easy removal and reinsertion into counterfeit documents, which complicates counterfeit detection.
Innovation Solution
A chip arrangement with a light sensor and test circuit that checks if the light pattern from a transparent layer matches a reference pattern, ensuring the chip is securely bonded to the carrier material by verifying the optical signature of the surrounding material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ID chip is mechanically embedded in carrier material, then chip bonding is achieved, but chip can be separated and inserted into counterfeit documents
Solution Approach 1:
The patent implements an optical feedback mechanism where a light source illuminates the chip carrier, and a light sensor detects the transmitted light pattern. The detected pattern is compared against a reference pattern stored in memory, providing continuous verification that the chip remains in its authentic carrier. This feedback loop immediately detects when a chip is removed or transferred to a counterfeit document.
Solution Approach 2:
The patent introduces an intermediary verification system between the chip and the document authenticity check. Instead of directly verifying document features, the system uses an intermediate optical pattern generated by the chip carrier itself as a mediator. This intermediary pattern serves as a unique identifier that links the chip to its specific carrier, preventing chip transfer to counterfeit documents.
2Reliability
If optical verification is implemented, then counterfeit detection capability is improved, but verification time increases
Solution Approach 1:
The patent performs preliminary action by storing the reference light pattern in memory during chip manufacturing or initial carrier assembly. This reference pattern is captured and stored before the chip is ever used in the field. During verification, only a quick comparison against this pre-stored pattern is needed, rather than performing complex analysis of document features in real-time.
Solution Approach 2:
The patent replaces complex mechanical or manual verification systems with a simple optical-electronic system. Instead of requiring physical inspection of document features or complex cryptographic verification, the system uses light transmission through the carrier material to generate a pattern that is electronically compared against a stored reference. This substitution dramatically reduces verification time while maintaining high reliability.
3Reliability
If light sensor arrangement is added to chip, then authentication capability is improved, but device complexity increases
Solution Approach 1:
The patent implements multi-functionality by integrating the light sensor arrangement into the existing chip structure, allowing the chip to serve both its original identification function and the new optical authentication function. The same chip that stores identification data now also contains light sensors that detect optical patterns, eliminating the need for separate authentication hardware and reducing overall system complexity.
Solution Approach 2:
The patent merges the light sensor arrangement with the chip structure itself, combining what could be separate components into a unified integrated unit. The light sensors are embedded within or on the chip, and the optical verification function is integrated with the chip's existing data storage and processing capabilities, creating a compact multi-functional authentication system.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the bonding between the chip and carrier material, enabling quick and cost-effective verification of the chip's authenticity, preventing counterfeiting by ensuring the chip is not removed from its original carrier.
Implementation Method 1
a light sensor arrangement (103); a transparent layer (104) covering the light sensor arrangement (103), the light sensor arrangement (103) being set up to determine a light pattern of light received by the light sensor arrangement (103) from outside the chip arrangement (100) through the transparent layer (104)
Data Source
AI summary
One embodiment describes a chip arrangement having a chip carrier; a chip which is arranged in or on the chip carrier; a light sensor arrangement; a transparent layer which covers the light sensor arrangement, the light sensor arrangement being set up to determine a light pattern of light received by the light sensor arrangement from outside the chip arrangement through the transparent layer; and a test circuit which is set up to check whether the light pattern matches a reference light pattern and to output a signal on the basis of the result of the check.