Chip Package Conducting Layer Enveloping for Oxidation Resistance
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Solution Overview
Problem
The existing chip package module conducting layers are prone to oxidization and instability due to exposure during manufacturing, leading to corrosion and vulnerability to external forces.
Innovation Solution
A through hole is created in the base with an insulation material coating, allowing the conducting layer to extend above the base and be enveloped by the insulation and masking layers, transforming the contact from T-contact to plane-contact for enhanced stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the conducting layer is exposed during manufacturing process, then the manufacturing process is simpler, but the conducting layer is vulnerable to oxidization and corrosion
Solution Approach 1:
The patent applies preliminary action by forming the enveloping structure (insulation layer + conducting layer + masking layer) before the cutting process. The groove is formed first, then the insulation layer is deposited to cover the groove and extend onto the base surface, followed by the conducting layer and masking layer. This sequence ensures the conducting layer is protected before any cutting occurs, preventing oxidization exposure while maintaining manufacturing feasibility.
Solution Approach 2:
The patent implements nesting by creating a multi-layer enveloping structure where the insulation layer, conducting layer, and masking layer are nested within each other. The insulation layer is nested inside the conducting layer, which is nested inside the masking layer, forming a protective nested structure that completely envelops the conducting layer and prevents oxidization while maintaining structural integrity during manufacturing.
2Ease of manufacture
If the conducting layer is exposed at cut-off location, then the manufacturing process is easier, but the conducting layer becomes unstable and prone to breaking
Solution Approach 1:
The patent applies preliminary action by forming the groove and the enveloping structure before the cutting process. The insulation layer is deposited to cover the groove and extend onto the base surface, creating a protective barrier before any cutting occurs. This ensures the conducting layer is stabilized and protected at the future cut-off location before the actual cutting takes place, preventing breaking and maintaining strength.
Solution Approach 2:
The patent implements beforehand cushioning by creating the enveloping structure with the insulation layer extending onto the base surface before cutting. This enveloping structure acts as a cushioning protective layer that absorbs and distributes stress at the cut-off location, preventing the conducting layer from breaking under external forces during and after the cutting process.
3Ease of manufacture
If T-contact structure is used for pin connection, then the manufacturing process is simpler, but the contact is less stable and prone to breaking
Solution Approach 1:
The patent applies dimensionality change by transitioning from a two-dimensional T-contact structure to a three-dimensional plane-contact structure. The conducting layer is extended to cover the entire top surface of the base and connect to the pin in a planar configuration rather than a perpendicular T-junction. This dimensional change from vertical T-contact to horizontal plane-contact significantly improves stability and resistance to breaking while maintaining manufacturing simplicity through standard deposition processes.
Data Source
AI summary
A conducting layer in a chip package module includes one or a plurality of through hole penetrating the top of a base being disposed at the bottom of an insulating layer in the chip package module, and inner wall of the through hole being applied with insulation material so that the conductive layer subsequently constructed to the peripheral of the insulation layer may pass the through hole to extend to where above the base before construction of a masking layer and multiple circuit pins to complete construction of the conducting layer that is totally enveloped so to prevent easy oxidization at the conducting layer and improve stability of the chip package to avoid breaking up due to external force applied.