Chip Package Structure Using Insulating-Layer Conductive Posts
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The miniaturization of chip package structures in semiconductor technology is hindered by the increased volume occupied by conductive structures, such as through silicon via (TSV) processes, which also raise manufacturing costs and complexity.
Innovation Solution
A semiconductor device design featuring a conductive layer with first pads, composite structures with chips, insulating layers, and second pads, where conductive posts connect the second pads to the first pads, allowing for higher integration and flexibility without occupying chip space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through silicon via (TSV) conductive structures are used to connect chips, then electrical connection between chips is achieved, but the volume occupied inside chips increases and manufacturing complexity rises
Solution Approach 1:
The conductive structures are extracted from the chip interior and relocated to the insulating layer surrounding the chip. This removes the volume occupation from within the chip while maintaining the electrical connection function through external conductive posts that connect to pads on the chip surface.
Solution Approach 2:
An insulating layer is introduced as an intermediary medium between the chip and the conductive structures. This insulating layer hosts the conductive posts and connects to chip pads through bonding pads, enabling electrical connection without requiring holes through the chip itself.
2Reliability
If through silicon via (TSV) conductive structures are used to connect chips, then electrical connection between chips is achieved, but manufacturing complexity and costs increase
Solution Approach 1:
The complex TSV drilling and filling process is replaced by forming conductive posts in the insulating layer, which can be accomplished through standard semiconductor fabrication processes such as spin coating, curing, and patterning, significantly reducing manufacturing complexity.
Solution Approach 2:
The insulating layer serves as a temporary or sacrificial structure during manufacturing that simplifies the overall process. It enables easy formation of conductive connections without requiring permanent modification of the chip structure through complex TSV processes.
3Length of moving object
If chip feature sizes are reduced to achieve miniaturization, then smaller chip dimensions are achieved, but the requirements on chip package technology become more stringent
Solution Approach 1:
The connection architecture transitions from vertical through-chip connections (TSV) to a planar arrangement using conductive posts in the insulating layer that connect to surface pads. This dimensional change allows better scaling for miniaturized chips while reducing package complexity requirements.
Solution Approach 2:
The electrical connection function is segmented into multiple components: chip pads, insulating layer with conductive posts, and bonding pads. This segmentation allows independent optimization of each component and simplifies the overall packaging requirements for miniaturized devices.
Data Source
AI summary
In one example, a semiconductor device includes a conductive layer, composite structures, conductive posts and first pads. The composite structures may be located on the conductive layer and stacked in a direction perpendicular to the plane in which the conductive layer is located. The composite structure may include a chip, an insulating layer surrounding around the chip, and at least one second pad electrically connected with the chip. The second pad is located on the insulating layer. The second pads of the composite structures are at different locations in the first direction. The first direction is perpendicular to the thickness direction of the composite structures. The conductive posts are located in the insulating layer of the composite structures and each conductive post is connected with one of the second pads and one of the first pads.