Chip Package Dummy Bump Corner Rounding for Underfill Crack Prevention
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Solution Overview
Problem
Current semiconductor chip packaging technologies face challenges in forming reliable underfill layers around chip packages with sharp corner portions, which can lead to crack formation and reduced yield due to stress concentration.
Innovation Solution
The method involves forming dummy solder balls with specific dimensions and shapes over the corner portions of the chip package structure to round the edges, thereby reducing stress concentration and improving the reliability of the underfill layer formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If chip packages are formed with sharp corner portions, then manufacturing process is simpler, but crack formation occurs in underfill layer due to stress concentration
Solution Approach 1:
The patent applies curvature by forming rounded corner portions on the chip package instead of sharp corners. Specifically, the chip package is designed with curved corners having a radius of curvature between 5-50 micrometers, which eliminates stress concentration points and prevents crack formation in the underfill layer during subsequent packaging processes.
Solution Approach 2:
The patent applies local quality by modifying only the corner portions of the chip package while keeping the rest of the package structure unchanged. The rounded corners are formed selectively at stress-prone locations using localized processes such as CMP (chemical mechanical polishing) or etching, allowing the majority of the chip package to maintain its original simple geometry for ease of manufacture.
2Reliability
If dummy solder balls are formed over corner portions, then stress concentration is reduced and crack formation is prevented, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by forming the rounded corner portions on the chip package before the underfill layer is applied. This pre-modification of the chip package geometry eliminates the need for additional dummy structures during subsequent packaging steps, as the rounded corners themselves prevent stress concentration and crack formation in the underfill layer.
Solution Approach 2:
The patent uses the chip package's own corner portions as the stress-concentration points to be modified, rather than adding separate dummy structures. The rounded corners are formed directly on the existing chip package substrate, eliminating the need for additional dummy solder balls or other complex structures that would increase device complexity.
Data Source
AI summary
A method for forming a chip package structure is provided. The method includes bonding a chip to a first surface of a first substrate. The method includes forming a dummy bump over a second surface of the first substrate. The first surface is opposite the second surface, and the dummy bump is electrically insulated from the chip. The method includes cutting through the first substrate and the dummy bump to form a cut substrate and a cut dummy bump. The cut dummy bump is over a corner portion of the cut substrate, a first sidewall of the cut dummy bump is substantially coplanar with a second sidewall of the cut substrate, and a third sidewall of the cut dummy bump is substantially coplanar with a fourth sidewall of the cut substrate.


