Chip Package Circuit Layer Openings for Edge Stress Relief

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Solution Overview

Problem

The existing electronic device package structures are prone to damage due to stress, particularly affecting the redistribution layers, which can lead to reliability issues and increased risk of cracking or chipping, especially around the chip's sides.

Innovation Solution

The electronic device incorporates a circuit structure layer with a redistribution structure layer and an element structure layer, both electrically connected to the chip, and featuring openings that overlap with the chip's sides, reducing stress and enhancing reliability by distributing it more evenly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the redistribution layer is made continuous and covers the entire chip area, then the electrical connection is improved, but the stress concentration increases leading to cracking or chipping

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidresistance to cracking or chipping
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The continuous redistribution layer is segmented into multiple discrete portions, each corresponding to different functional regions of the chip. This segmentation allows the redistribution layer to maintain electrical connections where needed while creating gaps that relieve stress concentration, thereby preventing cracking or chipping at the chip edges.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The redistribution layer is designed with non-uniform distribution, having higher density in central regions requiring electrical connections and lower density or absence at edge regions prone to stress. This local quality variation optimizes both electrical connectivity and mechanical strength at different locations.

Inventive Principle:
Principle #3Local quality

2Volume of moving object

If the package structure uses a compact design with layers closely spaced, then the device size is reduced, but the stress on redistribution layers increases

Engineering Contradiction:
Improvepackage sizeVSAvoidstress on redistribution layers
Core Design Contradiction:
Volume of moving objectVSStress or pressure

Solution Approach 1:

By segmenting the redistribution layer into discrete portions rather than a continuous structure, the patent reduces the cumulative stress on the layer while maintaining compact packaging. The gaps between segments act as stress relief zones, allowing the package to remain small without compromising layer integrity.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the redistribution layer is made thicker to improve conductivity, then the electrical performance is enhanced, but the stress and risk of damage increase

Engineering Contradiction:
Improveelectrical conductivityVSAvoidstress-induced damage risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

Rather than increasing the thickness of a continuous redistribution layer (which would increase stress), the patent uses segmented portions that can be optimized locally. Each segment maintains sufficient thickness for conductivity where needed, while the overall segmented structure reduces cumulative stress and damage risk.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240079348A1Electronic device
Publication Date: 2024.03.07 INNOLUX CORP
  • US20240079348A1 patent drawing
  • US20240079348A1 patent drawing
  • US20240079348A1 patent drawing

AI summary

An electronic device includes a chip and a circuit structure layer overlapped with the chip. The circuit structure layer includes a redistribution structure layer and an element structure layer, and the redistribution structure layer and the element structure layer are electrically connected to the chip. At least one of the redistribution structure layer and the element structure layer includes at least one opening, and in a normal direction of the electronic device, the at least one opening is overlapped with aside of the chip.