Chip Package Heat Dissipation Structure for Even Multi-Chip Cooling
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Solution Overview
Problem
Existing chip packaging technologies struggle with rapid and even heat dissipation for multiple heterogeneous chips and discrete devices in system-level chip packages, leading to heat accumulation and inefficient thermal management.
Innovation Solution
A chip package structure incorporating a heat dissipation apparatus with a laminated insulation layer and thermally conductive layer, which completely encloses the chips and discrete devices, increasing the heat dissipation area and facilitating even and rapid heat transfer to the air.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a metal heat sink or thermo electric cooler is added on a passive surface of the chip by using a thermal interface material, then the heat dissipation capability of the chip is improved, but the heat dissipation efficiency for the system-level chip package cannot achieve rapid and even heat dissipation of the multiple heterogeneous chips and discrete devices
Solution Approach 1:
The patent transitions from traditional bottom-side heat dissipation (one-dimensional) to a comprehensive enclosure structure that utilizes all six surfaces of the chip (three-dimensional). The insulation layer completely encloses the chip body, enabling heat dissipation from top, bottom, front, back, left, and right surfaces simultaneously, thereby achieving rapid and even heat dissipation for multiple heterogeneous chips and discrete devices in system-level chip packages.
Solution Approach 2:
The patent employs composite material structure consisting of an insulation layer made from materials with specific thermal conductivity properties. The insulation layer is configured to conduct heat while providing complete enclosure, utilizing composite material characteristics to achieve both thermal management and structural enclosure functions simultaneously.
2Temperature
If heat generated by the chip is transferred to the air through a metal heat sink or thermo electric cooler, then the heat dissipation capability is improved, but the heat accumulation or uneven heat dissipation occurs in a system-in-package structure
Solution Approach 1:
The patent implements six-sided heat dissipation by extending thermal management from traditional bottom-only contact to complete surface enclosure. The insulation layer wraps around all surfaces of the chip, creating multiple heat transfer pathways in different spatial dimensions, which eliminates heat accumulation and ensures uniform heat dissipation across all chips and discrete devices in the package.
Solution Approach 2:
The insulation layer is configured to enclose different surfaces of the chip independently, creating segmented heat dissipation zones on each face. This segmentation allows heat from different regions of the chip to be dissipated through dedicated pathways, preventing heat accumulation in specific areas and ensuring uniform temperature distribution across the system.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively enhances heat dissipation efficiency by increasing the heat dissipation area and ensuring even heat distribution across multiple chips and discrete devices, thereby improving the thermal management of system-level chip packages.
Implementation Method 1
the thermally conductive layer that are laminated is disposed, and the insulation layer completely encloses the multiple chips and multiple discrete devices in the chip package... the thermally conductive material is evenly doped with the formable insulating material to form the thermally conductive layer... the thermally conductive layer can also have good formability... the evenly doped thermally conductive material is used to ensure that all areas of the thermally conductive layer have even thermal conductivity, so as to implement even heat dissipation
Implementation Method 2
the insulation layers are further configured to conduct the heat generated by the multiple chips and the multiple discrete devices to the air, so that the heat generated by the multiple chips and the multiple discrete devices is directly dissipated by using the insulation layer
Implementation Method 3
the heat dissipation apparatus including the insulation layer and the thermally conductive layer that are laminated... effectively increase a heat dissipation area, and implement even and rapid heat dissipation for the multiple chips and the multiple discrete devices
Data Source
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AI summary
An embodiment of the present invention provides a chip package structure, including a substrate, multiple chips and multiple discrete devices that are packaged on an upper surface of the substrate, and a heat dissipation apparatus. The heat dissipation apparatus includes an insulation layer and a thermally conductive layer that are laminated. The insulation layer completely encloses and adheres to outer surfaces of the multiple chips, outer surfaces of the multiple discrete devices, and the upper surface of the substrate, and is configured to conduct heat generated by the multiple chips and the multiple discrete devices to the thermally conductive layer and the substrate, so that the heat generated by the multiple chips and the multiple discrete devices is dissipated by using the thermally conductive layer and the substrate. In addition, an embodiment of the present invention further provides a method for manufacturing a chip package structure. The heat dissipation apparatus is disposed in the chip package structure to implement even and efficient heat dissipation for a system-level chip package.