Chip Package Faraday Cage Grounding
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Solution Overview
Problem
Existing chip packages face challenges in effectively shielding high-frequency electromagnetic interference due to the antenna effect caused by conductors, which leads to poor performance and increased layout space requirements, especially with the use of leading wires or bolts for grounding.
Innovation Solution
A chip package design featuring a package substrate with multiple first conductive parts in the peripheral area and a metal cap that grounds these parts, forming a Faraday cage, along with second conductive parts on the side walls extending to the upper surface, to enhance electromagnetic shielding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If leading wire or bolt is used to ground the radiator, then electromagnetic interference shielding is implemented, but layout space is occupied and high-frequency signal impedance increases
Solution Approach 1:
The patent transitions from traditional planar grounding (leading wires on the circuit board surface) to three-dimensional grounding by extending conductive parts along the side walls of the package substrate. This vertical dimensionality change enables effective electromagnetic shielding without occupying additional layout space on the circuit board, as the grounding path utilizes the vertical space above the substrate.
Solution Approach 2:
The grounding system is segmented into multiple components: first conductive parts on the upper surface, second conductive parts on the side walls, and a grounding part on the package substrate. This segmentation allows each component to perform its function optimally while collectively achieving comprehensive electromagnetic shielding without requiring a single large grounding element that would occupy excessive space.
2Object-affected harmful factors
If leading wire or bolt is used to ground the radiator, then electromagnetic interference shielding is implemented, but high-frequency signal impedance increases due to inductive effect
Solution Approach 1:
By moving the grounding path from the horizontal plane to the vertical dimension through side wall conductive parts, the patent reduces the loop area for high-frequency signals. This dimensional transition minimizes the inductive effect and associated impedance, improving high-frequency signal integrity while maintaining effective electromagnetic shielding.
Solution Approach 2:
The conductive parts are pre-positioned along the side walls before final assembly, creating an optimized grounding path that is inherently low-impedance for high-frequency signals. This preliminary configuration ensures that the grounding structure is designed from the outset to minimize inductive effects rather than being an afterthought.
3Object-affected harmful factors
If conventional grounding method is used, then electromagnetic interference shielding is achieved, but shielding performance at high frequency is poor
Solution Approach 1:
The patent achieves superior high-frequency shielding by utilizing the vertical dimension through side wall conductive parts. This three-dimensional grounding structure creates multiple shielding planes and reduces the effective wavelength of the grounding path, significantly improving high-frequency electromagnetic interference shielding performance compared to conventional two-dimensional grounding methods.
Solution Approach 2:
The grounding system employs a composite structure combining conductive parts on the upper surface, side walls, and package substrate. This composite arrangement creates a multi-layered shielding system that effectively addresses a broader frequency range, particularly enhancing high-frequency shielding performance through the synergistic effect of multiple conductive elements in different spatial positions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively improves high-frequency electromagnetic interference shielding, reducing antenna effects and maintaining compact layout, thereby enhancing chip performance and reducing interference.
Implementation Method 1
the multiple first conductive parts and the metal cap form a grounded Faraday cage, to implement favorable high-frequency electromagnetic shielding for a silicon chip arranged therein
Implementation Method 2
implement high-frequency electromagnetic interference shielding, and improve chip performance
Data Source
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AI summary
A chip package and a packaging method are provided by embodiments of the present invention, which relates to the field of communications technologies, and is invented to implement high-frequency electromagnetic interference shielding and effectively improve chip performance. The package includes a package substrate and a metal cap covering the package substrate, where a silicon chip placement area is arranged on an upper surface of the package substrate, multiple first conductive parts are arranged in a peripheral area of the silicon chip placement area, and an edge of the metal cap is in contact with the package substrate and electrically connected to the multiple first conductive parts, where at least a portion of first conductive parts in the multiple first conductive parts are electrically connected to a grounding part by using the metal cap, and the grounding part is arranged on the package substrate, and configured to ground the package substrate. The present invention is applicable to a chip package processing technology.