Chip Package Structure Ground Bonding Wire Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional chip packaging methods result in poor heat dissipation performance, high trace inductance, increased silicon area usage, and difficulties in implementing multi-chip systems due to extended ground bonding wire lengths and complex wire connections.
Innovation Solution
A chip package structure featuring reduced ground bonding wire lengths, interleaved ground and switch signal bonding wires, and direct connections to a lead frame, which reduces wire resistance and silicon area consumption, facilitating better heat dissipation and multi-chip system integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional chip packaging methods are used with extended ground bonding wires, then electrical connections can be established, but wire resistance increases and heat dissipation performance deteriorates
Solution Approach 1:
The patent extracts the ground connection function from the traditional bonding wire path and establishes a direct mechanical electrical connection between the chip substrate and lead frame. This removes the ground bonding wire from the electrical path, eliminating its resistance and inductance contributions while maintaining the grounding function through the substrate-mounting structure interface.
Solution Approach 2:
The patent segments the electrical connection paths by separating ground connections from signal connections. Ground connections are established through the substrate-mounting structure interface, while signal connections use bonding wires. This segmentation allows optimization of each path independently, minimizing ground loop area and reducing electromagnetic interference.
2Area of stationary object
If conventional packaging structures are used, then chip can be connected to lead frame, but silicon area is increased due to crown and switch signal bonding wire interleaving
Solution Approach 1:
The patent extracts the ground connection function from the bonding wire system and implements it through the substrate-mounting structure mechanical interface. This eliminates the need for ground bonding wires that would otherwise need to be interleaved with signal wires, reducing the required silicon area and simplifying the packaging structure.
3Reliability
If extended ground bonding wires are used in conventional packaging, then electrical connections are established, but trace inductance increases
Solution Approach 1:
The patent removes ground bonding wires from the electrical connection system and replaces them with a direct mechanical electrical connection through the substrate-mounting structure interface. This eliminates the inductance contribution from ground bonding wires and their associated loops, improving high-frequency performance while maintaining electrical connectivity.
4Adaptability or versatility
If conventional packaging methods are used, then single chip can be packaged, but multi-chip system implementation becomes difficult
Solution Approach 1:
The patent designs the substrate-mounting structure with universal functionality that serves multiple purposes: mechanical support, electrical grounding, and thermal management. This multi-functional design creates a standardized interface that can accommodate single-chip or multi-chip configurations, enabling scalable system integration without requiring redesign of the packaging structure.
Data Source
AI summary
Methods and structures related to packaging a chip are disclosed. In one embodiment, a chip package structure includes: (i) a chip having a plurality of first and second contact pads thereon; (ii) a lead frame having a plurality of pins for external connection to the package structure, where the chip is disposed on the lead frame; (iii) a plurality of first bonding wires for connecting the first contact pads to the lead frame; and (iv) a plurality of second bonding wires for connecting the second contact pads to the plurality of pins on the lead frame.