Chip Package Grounding Line with End Enlarged Portion for EMI Shielding

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Solution Overview

Problem

The semiconductor industry faces challenges in managing electromagnetic interference (EMI) as feature sizes decrease, making fabrication processes more difficult and affecting device performance, particularly due to increased complexity and sensitivity of semiconductor devices.

Innovation Solution

A chip package structure is formed with a grounding line that includes an end enlarged portion, which is thicker than the main portion, allowing for enhanced contact area and reduced contact resistance with a conductive shielding film, thereby effectively mitigating EMI through mechanical singulation and the use of a conductive shielding material layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but electromagnetic interference becomes more severe and device performance is degraded

Engineering Contradiction:
Improveproduction efficiencyVSAvoidelectromagnetic interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

A conductive shielding film is introduced as an intermediary between the semiconductor device and the external environment to block electromagnetic interference. The shielding film acts as a mediator that protects the device from EMI while allowing the device to continue operating at reduced feature sizes for improved productivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the physical parameters of the grounding line by creating an end enlarged portion with increased thickness and contact area. This parameter change reduces contact resistance and improves the effectiveness of EMI shielding, allowing the device to maintain performance despite smaller feature sizes.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If conventional grounding lines with uniform thickness are used, then manufacturing is simpler, but contact resistance with shielding film is high and EMI shielding effectiveness is reduced

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidEMI shielding effectiveness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The grounding line is designed with non-uniform thickness, featuring an end enlarged portion that is thicker than the main body. This local quality change concentrates the shielding effectiveness at the critical contact area with the shielding film, reducing contact resistance where it matters most while maintaining manufacturing feasibility.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The grounding line geometry is modified by adding vertical thickness variation through the end enlarged portion. This dimensional change increases the contact area with the shielding film in the vertical dimension, improving electrical contact and EMI shielding effectiveness without significantly complicating the manufacturing process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The enhanced contact area between the grounding lines and the conductive shielding film reduces contact resistance, effectively shielding against electromagnetic interference and improving the performance and reliability of semiconductor devices.

Implementation Method 1

a conductive shielding film over the chip structure and the first sidewall to electrically connect to the grounding line

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS10515904B2Method for forming chip package structure
Publication Date: 2019.12.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10515904B2 patent drawing
  • US10515904B2 patent drawing
  • US10515904B2 patent drawing

AI summary

Methods for forming chip package structures are provided. The method includes disposing a first chip structure, a second chip structure over a carrier substrate and forming a molding compound layer surrounding the first chip structure and the second chip structure. The method includes forming a dielectric structure over the molding compound layer and a first grounding line in the dielectric structure and cutting the first grounding line to form a first end enlarged portion of the first grounding line. In addition, the first end enlarged portion has a gradually increased thickness.