Chip Package Heat Dissipation Layer Segmentation
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Solution Overview
Problem
Traditional chip package structures suffer from poor heat dissipation efficiency, limiting the applicability of electric motor products due to the reliance on wire bonding techniques that hinder effective heat removal.
Innovation Solution
The proposed chip package structure incorporates a heat dissipation layer that is electrically insulated from circuit structures, allowing for enhanced heat conduction to the outside while maintaining electrical signal transmission through conductive vias, thereby improving heat dissipation without interfering with signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding techniques are used to combine chip with lead frame, then electrical signal transmission is achieved, but heat dissipation efficiency deteriorates
Solution Approach 1:
The patent separates the electrical connection function and heat dissipation function into distinct structural components. The lead frame is divided into separate regions: one for electrical signal transmission (contact pads and bonding wires) and another for heat dissipation (heat dissipation portion with through-holes and fins). This segmentation allows each function to be optimized independently without interfering with the other.
Solution Approach 2:
The patent introduces an intermediary heat dissipation portion between the chip and the external environment. This intermediate structure includes through-holes penetrating the lead frame and may include fins or other heat exchange surfaces, serving as a mediator that transfers heat from the chip to the external cooling medium without interfering with the electrical bonding wire connections.
2Reliability
If traditional encapsulated package structure is used, then chip protection is achieved, but heat dissipation is hindered
Solution Approach 1:
The patent applies local quality by providing different structural characteristics in different regions of the package. The encapsulant covers and protects the chip and bonding wires, while the lead frame's heat dissipation portion remains exposed or partially exposed to facilitate heat transfer. This localized differentiation allows simultaneous achievement of chip protection and effective heat dissipation.
3Temperature
If heat dissipation layer is integrated with circuit structure, then thermal management is improved, but electrical interference risk increases
Solution Approach 1:
The patent segments the lead frame into functionally distinct portions: the circuit structure portion for electrical signal transmission and the heat dissipation portion for thermal management. By physically separating these functions within the same component, the design achieves effective thermal management while minimizing electrical interference between the heat dissipation layer and circuit structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly enhances heat dissipation efficiency by isolating heat dissipation layers from circuit structures, reducing the risk of electrical interference and improving the thermal management of power chips, thus expanding the operational specifications of electric motor products.
Implementation Method 1
a heat dissipation layer that does not have a function of transmitting electrical signals
Implementation Method 2
The encapsulant is disposed on the first insulating layer and encapsulates the first circuit structure, the first chip, and the second circuit structure
Data Source
AI summary
A chip package structure including first and second insulating layers, first and second circuit structures, a chip on the first circuit structure, an encapsulant, a conductive through via, and first and second heat dissipation layers is provided. The first circuit structure is disposed at the first surface of the first insulating layer. The bottom electrode of the chip is electrically connected to the first circuit structure. The second circuit structure is disposed on the chip and electrically connected to the top electrode of the chip. The encapsulant encapsulates the first and second circuit structures and the chip. The conductive through via is disposed in the encapsulant and connects the first and second circuit structures. The second insulating layer is disposed on the second circuit structure. The first heat dissipation layer is disposed on the first insulating layer. The second heat dissipation layer is disposed on the second insulating layer.


