Chip Package Laser Stopper and Isolation Layer Structure
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Solution Overview
Problem
The manufacturing of chip packages, particularly for fingerprint and RF sensors, is hindered by time-consuming and costly chemical vapor deposition and patterning processes, which affect the flatness and detecting accuracy of the sensing surface.
Innovation Solution
A chip package design that includes a laser stopper, an isolation layer, a redistribution layer, and an insulating layer, where the laser stopper is electroplated on the conductive pad, and a laser is used to form a second through hole in the isolation layer, allowing for electroplating of the redistribution layer without the need for traditional CVD and patterning processes, thereby improving flatness and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional CVD and patterning processes are used to form isolation layer and redistribution layer, then electrical connection can be achieved, but manufacturing time increases and equipment cost increases
Solution Approach 1:
The patent replaces the traditional CVD (chemical vapor deposition) and photolithography patterning processes with a laser-based direct writing system. The laser directly writes the redistribution layer pattern onto the isolation layer, eliminating the need for photoresist coating, exposure, development, and etching steps. This substitution of mechanical/chemical processes with optical processing significantly reduces manufacturing time while maintaining connection precision.
Solution Approach 2:
The patent extracts and eliminates the complex multi-step CVD and patterning process sequence, retaining only the essential function of forming the redistribution layer. By using laser direct writing, the process removes intermediate steps including photoresist application, pattern exposure, chemical development, and selective etching, thereby reducing both time and equipment requirements while achieving the same electrical connection function.
2Manufacturing precision
If traditional CVD and patterning processes are used to form isolation layer and redistribution layer, then electrical connection can be achieved, but equipment cost increases
Solution Approach 1:
The patent replaces expensive CVD equipment and photolithography tools with a laser direct writing system. The laser apparatus, while sophisticated, eliminates the need for cleanroom-grade CVD chambers, photoresist spin coaters, exposure aligners, and etching reactors. This substitution significantly reduces equipment investment and operational costs while maintaining the precision needed for electrical connections.
Solution Approach 2:
The patent extracts the essential function of pattern formation from the complex CVD-patterning-etching toolchain, achieving the same result with a single laser writing step. This eliminates multiple expensive pieces of equipment and their associated maintenance, consumables (photoresist, etchants), and cleanroom infrastructure requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method saves time and reduces equipment costs by omitting the CVD and patterning processes, enhancing the flatness of the chip surface and improving detection accuracy.
Implementation Method 1
the laser can be shielded by the laser stopper, and the second through hole exposing the laser stopper is formed in the isolation layer
Implementation Method 2
a laser stopper is electroplated on the conductive pad that is in the first through hole
Data Source
AI summary
A chip package includes a chip, a laser stopper, an isolation layer, a redistribution layer, an insulating layer, and a conductive structure. The chip has a conductive pad, a first surface, and a second surface. The conductive pad is located on the first surface. The second surface has a first through hole to expose the conductive pad. The laser stopper is located on the conductive pad in the first through hole. The isolation layer is located on the second surface and in the first through hole. The isolation layer has a third surface opposite to the second surface, and has a second through hole to expose the laser stopper. The redistribution layer is located on the third surface, a sidewall of the second through hole, and the laser stopper in the second through hole. The conductive structure is located on the redistribution.