Chip Package Pin Dot and Gate Contact Identification

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Solution Overview

Problem

In semiconductor packaging, the pin gate contact and pin one dot are often difficult to distinguish due to their similar locations and rough surfaces, leading to identification challenges.

Innovation Solution

The pin one dot and pin gate contact are positioned at different corners of the chip package structure, with the pin gate contact treated to enhance visibility, using a surface treatment like laser planarization, and designed as concentric circles to differentiate them effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the pin gate contact and pin one dot are formed at similar locations on the top surface of the molding compound, then the manufacturing process is simple, but it becomes difficult to identify the pin one dot due to rough surfaces and overlapping positions

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoididentification difficulty of pin one dot
Core Design Contradiction:
Ease of manufactureVSDifficulty of detecting and measuring

Solution Approach 1:

The patent divides the top surface features into distinct segments by positioning the pin one dot and pin gate contact at different corners of the molding compound top surface. This spatial segmentation allows each feature to be independently identified without confusion, resolving the detection difficulty while maintaining manufacturing simplicity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs asymmetric positioning where the pin one dot is located at a first corner and the pin gate contact is located at a second corner of the top surface. This asymmetric arrangement creates visual distinction between the two features, making the pin one dot easily identifiable despite the rough surface texture.

Inventive Principle:
Principle #4Asymmetry

2Strength

If the pin gate contact has a rough surface, then it provides good mechanical bonding, but it becomes difficult to identify the pin one dot due to surface roughness

Engineering Contradiction:
Improvemechanical bonding strengthVSAvoidvisibility of pin one dot
Core Design Contradiction:
StrengthVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies local quality by maintaining the rough surface texture of the pin gate contact for mechanical bonding while creating a distinct visual feature at the pin one dot location. The pin one dot is formed as a separate identifiable feature at a different corner, allowing it to be distinguished from the rough pin gate contact surface.

Inventive Principle:
Principle #3Local quality

3Device complexity

If the pin one dot and pin gate contact are located at the same position, then the mold chase design is simplified, but mistaken identification occurs between the two features

Engineering Contradiction:
Improvemold chase design complexityVSAvoididentification accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent resolves the identification conflict by transitioning from a single-position design to a multi-position arrangement on the two-dimensional top surface. By utilizing different corner positions, the patent creates clear spatial differentiation between the pin one dot and pin gate contact, eliminating mistaken identification while keeping the mold chase design relatively simple.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution allows for clear identification of the pin one dot and enables the pin gate contact to function as a recognizable element, resolving the issue of mistaken identification and improving the chip package structure's visibility and functionality.

Implementation Method 1

the surface treatment can be, for example, a laser planarization treatment process

Methodology Applied
Scientific EffectLaser planarization: Laser Ablation

Data Source

PatentUS8405232B2Chip package structure
Publication Date: 2013.03.26 ADVANCED SEMICON ENG INC
  • US8405232B2 patent drawing
  • US8405232B2 patent drawing
  • US8405232B2 patent drawing

AI summary

A chip package structure including a carrier, a chip and a molding compound is provided. The chip is disposed on the carrier. The molding compound encapsulates a portion of the carrier and the chip. The top surface of the molding compound has a pin one dot and a pin gate contact. The pin one dot is located at a first corner on the top surface. The pin gate contact is located at a second corner except the first corner. The invention further provides a chip package mold chase and a chip package process using to form the chip package structure.