Semiconductor Chip Package Recess Layout to Prevent Molding Seepage

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Solution Overview

Problem

Current methods for producing semiconductor chip packages are inefficient and prone to material seepage, requiring tie bars and resulting in burr-shaped structures, which complicates the production process and can lead to material leakage.

Innovation Solution

A method involving a carrier layer with strategically formed recesses filled with molding compounds, eliminating the need for tie bars, and optimizing the shape and arrangement of these recesses to prevent material seepage, while allowing for closer electrical contact placement for improved thermal dissipation and package efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional packaging methods are used, then packages can be produced, but the production process is inefficient and requires tie bars resulting in burr-shaped structures

Engineering Contradiction:

Improveproduction efficiencyVSAvoidproduction process complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The invention extracts and eliminates the tie bar component from the packaging structure. By removing the tie bar requirement, the patent simplifies the production process and eliminates the associated burr-shaped structures, directly addressing the complexity and efficiency issues in conventional packaging methods

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The carrier layer is segmented into multiple recesses that can be independently formed and filled. This segmentation allows for parallel processing of multiple packages simultaneously on the same carrier, significantly improving production efficiency while eliminating the need for tie bars to hold the structure together

Inventive Principle:

Principle #1Segmentation

2Reliability

If conventional packaging structures are used, then packages can be assembled, but material seepage occurs and burr-shaped structures are formed

Engineering Contradiction:

Improvematerial containmentVSAvoidmaterial seepage and burr formation

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by designing recesses with specific geometric characteristics (larger lateral extension than vertical depth) that preemptively prevent material seepage before it can occur. The recess shape creates a physical barrier that stops material leakage at the source, eliminating the need for additional containment measures

Inventive Principle:

Principle #9Preliminary anti-action

Solution Approach 2:

The recesses are designed with asymmetric dimensions where the lateral extension is deliberately made larger than the vertical depth. This asymmetric geometry optimizes the recess shape to prevent material seepage while avoiding burr formation during the molding process, directly addressing the harmful effects of conventional symmetric structures

Inventive Principle:

Principle #4Asymmetry

3Strength

If electrical contacts are placed farther apart for mechanical stability, then package strength is maintained, but thermal dissipation is reduced

Engineering Contradiction:

Improvepackage mechanical stabilityVSAvoidthermal dissipation

Core Design Contradiction:

StrengthVSTemperature

Solution Approach 1:

The patent applies local quality by allowing electrical contacts to be placed closer together in specific local regions where the optimized recess structure provides sufficient mechanical support. This localized approach enables improved thermal dissipation through closer contact placement while maintaining overall package strength through the structurally optimized recess design

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the production process, reduces material seepage, enables smaller semiconductor chip placement for higher density, and enhances thermal dissipation and mechanical stability by eliminating tie bars and optimizing the path for material leakage prevention.

Implementation Method 1

The first recess can be formed by etching. The first recess can be formed by etching the carrier layer in a region at the first side.

Methodology Applied

Scientific EffectEtching:

Implementation Method 2

The cover layer can be deposited by sputtering.

Methodology Applied

Scientific EffectSputtering: Sputtering

Data Source

PatentUS20250014970A1Method for producing a package for a semiconductor chip, package for a semiconductor chip and semiconductor device

Publication Date: 2025.01.09 AMS OSRAM INT GMBH

AI summary

In an embodiment a method for producing a package includes providing a carrier layer comprising an electrically conductive material, forming at least one first recess at a first side of the carrier layer, filling the first recess with a first molding compound, depositing a cover layer comprising an electrically conductive material on the first molding compound, forming at least one second recess at a second side of the carrier layer, wherein the second recess extends up to the first molding compound arranged in the first recess, the second side of the carrier layer facing away from the first side, filling the second recess with a second molding compound, forming at least one third recess in the cover layer, wherein the third recess extends up to the first molding compound arranged in the first recess, and filling the third recess with a third molding compound.