Chip Package Reinforcing Layer for Wafer Cutting Protection

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Solution Overview

Problem

Conventional wafer level packaging methods weaken the chip package structure and can damage or contaminate the chip surface during the cutting process due to the removal of the protection substrate.

Innovation Solution

A reinforcing layer is formed on the first surface of the chip, enhancing its strength and protecting it from damage, while solder bumps on the second surface facilitate electrical connection with external circuits, and a strengthening layer may be added for further mechanical support.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the protection substrate is removed from the wafer before cutting, then the packaging process can proceed, but the chip surface may be damaged and contaminated during the cutting process

Engineering Contradiction:
Improvepackaging process progressionVSAvoidchip surface integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a reinforcing layer on the chip surface before the cutting process. This reinforcing layer is prepared in advance to provide protection during subsequent cutting operations, preventing surface damage and contamination while allowing the packaging process to proceed normally.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The reinforcing layer acts as an intermediary between the chip surface and the cutting process. It serves as a protective mediator that prevents direct contact between the cutting tool and the chip surface, thereby preventing damage and contamination while enabling the cutting operation to complete successfully.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the protection substrate is removed in advance, then the packaging flow is simplified, but the strength of the chip package structure is weakened

Engineering Contradiction:
Improvepackaging flow complexityVSAvoidchip package structure strength
Core Design Contradiction:
Device complexityVSStrength

Solution Approach 1:

The reinforcing layer is formed in advance on the chip surface before cutting and packaging operations. This preliminary strengthening action ensures that the chip package structure maintains adequate strength throughout the simplified packaging process, preventing structural weakness that would result from early protection substrate removal.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The reinforcing layer is applied locally to specific areas of the chip surface that require enhanced strength protection. This localized quality enhancement provides targeted structural reinforcement where needed most during the packaging process, maintaining overall package strength without adding unnecessary complexity throughout the entire structure.

Inventive Principle:
Principle #3Local quality

3Reliability

If a reinforcing layer is added to protect the chip surface, then surface damage is prevented, but the device structure becomes more complex

Engineering Contradiction:
Improvechip surface protectionVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The reinforcing layer modifies the physical and chemical parameters of the chip surface by adding a layer with different material properties (hardness, adhesion, chemical resistance). This parameter change provides enhanced protection against surface damage while maintaining a relatively simple structural addition that integrates well with the existing chip architecture.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10541186B2Chip package and chip packaging method
Publication Date: 2020.01.21 CHINA WAFER LEVEL CSP
  • US10541186B2 patent drawing
  • US10541186B2 patent drawing
  • US10541186B2 patent drawing

AI summary

A chip package and a chip packaging method are provided. The package includes: a chip to be packaged, a reinforcing layer and solder bumps. The chip to be packaged includes a first surface and a second surface opposite to each other, the first surface includes a sensing region and first contact pads, and the first contact pads are electrically coupled to the sensing region. The reinforcing layer covers the first surface of the chip to be packaged. The solder bumps are provided on the second surface of the chip to be packaged. The solder bump is electrically connected to the first contact pad and is configured to electrically connect with an external circuit.